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M35060 Datasheet, PDF (1/42 Pages) Mitsubishi Electric Semiconductor – SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS    
MITSUBISHI MICROCOMPUTERS
M35060-XXXSP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
DESCRIPTION
M35060-XXXSP is CATV screen display control IC which can dis-
play 40 (horizontal) ! 16 (vertical). It has built-in SYRAM which can
be used with character ROM.
It uses a silicon gate CMOS process and it housed in a small 32-pin
shrink DIP package. For M35060-001SP and M35060-002SP that
are standard ROM versions of M35060-XXXSP, the character pat-
terns are also mentioned.
FEATURES
• Screen composition ................................ 40 characters ! 16 lines
• Number of characters displayed ................................... 680 (Max.)
• Character composition ..................................... 12 ! 13 dot matrix
• Characters available character ROM ................ 256 characters
SYRAM .............................. 63 characters
• Character sizes available horizontal ..................... 2 (once, twice)
vertical ......................... 2 (once, twice)
setting by every line
• Display locations available
Horizontal direction ................................................ 480 locations
Vertical direction .................................................... 235 locations
• Blinking ................................................................... character units
Cycle .... approximately 1 second, or approximately 0.5 seconds
Duty ............................................................... 25%, 50% or 75%
• Data input ............................................................ 8-bit parallel ! 3
• Coloring Character coloring ......... 8 colors choices per character
Background coloring ..... 8 colors choices per character
Raster coloring .................. 8 colors choices per screen
• Blanking
Character size blanking
Border size blanking
Matrix-outline
Halftone blanking
• General-purpose output ports
Can be set by every line
Combined port output ............ 6
(switching to RGB output)
• RAM erase ............................. Display RAM erasing by every line
SYRAM erasing separately
• Scrolling ............ Bit by bit smooth scroll implemented by software
• Composite synchronizating signal generation .................... Built-in
(PAL, NTSC, M-PAL)
• Display oscillation circuit .................................................... Built-in
• Synchronous separation circuit .......................................... Built-in
• Synchronous correction circuit ........................................... Built-in
PIN CONFIGURATION (TOP VIEW)
AD0
1
AD1
2
AD2
3
AD3
4
AD4
5
AD5
6
AD6
7
AD7
8
AC
9
VDD1
10
VSS
11
CVIDEO
12
LECHA
13
LEBK 14
CVIN 15
HOR 16
32 CS
31 SCK
30 TESTA
29 P5
28 P4
27 P3
26 P2
25 P1
24 P0
23 TESTB
22 OSCIN
21 OSCOUT
20 LP2
19 VDD2
18 LP1
17 VREF
Outline 32P4B
REV.1.1