MT8976 Datasheet, PDF (23/26 Pages) Mitel Networks Corporation – ISO-CMOS ST-BUS™ FAMILY T1/ESF Framer Circuit

ISO-CMOS MT8976
AC Electrical Characteristics^† - DS1 Link Timing (Figures 21 & 22)
Parameters
Sym Min Typ^‡ Max Units
Test Conditions
1 Transmit FDL Setup Time
t_DLS
110
ns
2 Transmit FDL Hold Time
t_DLH
70
ns
3 Receive FDL Output Delay
t_DLOD
0
ns 50 pF Load
4 Receive FDL Clock Delay
t_FRCD
185
50 pF Load
5 Transmit FDL Clock Delay
t_TFCD
135 ns 50 pF Load
† Timing is over recommended temperature & power supply voltage ranges.
. ‡ Typical figures are at 25°C and are for design aid only; not guaranteed and not subject to production testing
F0i
Frame 12/24
C2i
Frame 1
Frame 2
RxFDLClk
RxFDL
TxFDLClk
TxFDL
Figure 21 - Clock & Frame Alignment for RxFDL and TxFDL
2.0V
C2i
0.8V
Frame
2.0V
0.8V
2.0V
RxFDLClk
0.8V
RxFDL
2.0V
0.8V
2.0V
TxFDLClk
0.8V
t_RFCD
TxFDL
2.0V
0.8V
t_DLOD
t_TFCD
t_DLS
t_DLH
Figure 22 - Facility Data Link Timing
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