MT9126 Datasheet, PDF (12/22 Pages) Mitel Networks Corporation – CMOS Quad ADPCM Transcoder

MT9126
Preliminary Information
MCLK (C4i)
F0i
C2o
EN1 ^(output)
F0od/ENB2
PCMi/o1
PCMi/o2
ADPCMi/o
(32/24 kb/s)
bit 4 = x at 24 kbit/s
ADPCMi/o
(16 kb/s)
AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA_{AAAAAAAAAAAAAAASAAAAAAAAAAAAAAASSAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA12AAAAAAAAAAAAAAA1AAAAAAAAAAAAAAA1AAAAAAAAAAAAAAA1BAAAAAAAAAAAAAAA0AAAAAAAAAAAAAAA91AAAAAAAAAAAAAAA8AAAAAAAAAAAAAAA7AAAAAAAAAAAAAAA6AAAAAAAAAAAAAAA5AAAAAAAAAAAAAAAAAAAAAAAAAAAAAA4 AAAAAAAAAAAAAAA3AAAAAAAAAAAAAAA2AAAAAAAAAAAAAAA1AAAAAAAAAAAAAAA0AAAAAAAAAAAAAAA}^{AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA}_{11BAAAAA1BS22SAAAAAS31AAAAASE1B42AAAAA21LAAAAA21AAAAA11B=3B21AAAAA2BAAAAA132010BAAAAA44229AAAAAAAAAAA8AAAAAAAAAAA11B1SAAAAAB722AAAAA6E331AAAAAB524L2AAAAA4AAAAA31=1B3AAAAAB222AAAAA1314AAAAA1B440AAAAA2AA}^{AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA}_{AAAAAAAAAAAAAAASS1AAAAAAAAAAAAAAAS6AAAAAAAAAAAAAAAESAAAAAAAAAAAAAAAkL1AAAAAAAAAAAAAAAb2AAAAAAAAAAAAAAA1o/AAAAAAAAAAAAAAA1spAAAAAAAAAAAAAAA1o0AAAAAAAAAAAAAAAeBAAAAAAAAAAAAAAA9nra3AAAAAAAAAAAAAAA8lyAAAAAAAAAAAAAAAt7eAAAAAAAAAAAAAAA6dAAAAAAAAAAAAAAA5AAAAAAAAAAAAAAA4fAAAAAAAAAAAAAAAo3AAAAAAAAAAAAAAA2rAAAAAAAAAAAAAAA1AAAAAAAAAAAAAAA0AAAAAAAAAAAAAAAAAAAAAAAAAAAAAA}^{AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA}_{AAAAAAAAAAAAAAASAAAAAAAAAAAAAAASAAAAAAAAAAAAAAASAAAAAAAAAAAAAAA1AAAAAAAAAAAAAAA2AAAAAAAAAAAAAAA1AAAAAAAAAAAAAAA1 AAAAAAAAAAAAAAA10AAAAAAAAAAAAAAAB9AAAAAAAAAAAAAAA84AAAAAAAAAAAAAAAAAAAAAAAAAAAAAA7 AAAAAAAAAAAAAAA6AAAAAAAAAAAAAAA5AAAAAAAAAAAAAAA4AAAAAAAAAAAAAAA3AAAAAAAAAAAAAAA2AAAAAAAAAAAAAAA1AAAAAAAAAAAAAAA0AAAAAAAAAAAAAAAAAAAAA}^{AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA}
AAA_AAAAA_AAAAA_AAAAA_AAAAA_AAAAA_AAAAA_AAAAA_AAAAA_AAAAA_AAAAA_AAAA_AA^A
outputs = High impedance
inputs = don’t care
X = undetermined logic level output; don’t care input
Outputs high impedance outside of channel boundaries
Two frame delay from data input to data output
Note: D &C channels not supported in this mode.
Figure 8 - ST-BUS 16-bit Linear PCM Relative Timing
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