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MT9174 Datasheet, PDF (1/4 Pages) Mitel Networks Corporation – ISO2-CMOS ST-BUS™ FAMILY Digital Network Interface Circuit with Receive Sync Marker Bit
ISO2-CMOS ST-BUS™ FAMILY MT9174
®
Digital Network Interface Circuit
with Receive Sync Marker Bit
Features
• Receive sync output pulse
• Full duplex transmission over a single twisted
pair
• Selectable 80 or 160 kbit/s line rate
• Adaptive echo cancellation
• Up to 4 km loop reach
• ISDN compatible (2B+D) data format
• Transparent modem capability
• Frame synchronization and clock extraction
• MITEL ST-BUS compatible
• Low power (typically 50 mW), single 5V supply
Applications
• TDD Digital PCS (DECT, CT2, PHS) base
stations requiring cell synchronization
• Digital subscriber lines
• High speed data transmission over twisted
wires
• Digital PABX line cards and telephone sets
• 80 or 160 kbit/s single chip modem
ISSUE 1
Ordering Information
May 1995
MT9174AE
MT9174AN
MT9174AP
24 Pin Plastic DIP
24 Pin SSOP
28 Pin PLCC
-40°C to +85°C
Description
The MT9174 is identical to the MT9172 in all
respects except for the addition of one feature. The
MT9174 includes a digital output pin indicating the
temporal position of the "SYNC" bit of the biphase
transmission. This feature is especially useful for
systems such as PCS wireless base stations
applications requiring close synchronization between
microcells.
The MT9174 is fabricated in Mitel’s ISO2-CMOS
process.
DSTi/Di
CDSTi/
CDi
F0/CLD
C4/TCK
F0o/RCK
MS0
MS1
MS2
RegC
DSTo/Do
CDSTo/
CDo
RxSB
Transmit
Interface
Prescrambler
Scrambler
Differentially
Encoded Biphase
Transmitter
Transmit
Filter &
Line Driver
Control
Register
Transmit
Timing
Master Clock
Phase Locked
Transmit/
Clock
Receive
Timing &
Control Sync Detect
DPLL
Status
Receive
Address
Echo Canceller
Error
Signal Echo Estimate
—
+
∑
Receive
Filter
VBias
MUX
-1
+2
Receive
Interface
De-
Prescrambler
Descrambler
Differentially
Encoded Biphase
Receiver
VDD VSS VBias VRef
Figure 1 - Functional Block Diagram
LOUT
LOUT
DIS
Precan
LIN
OSC2
OSC1
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