MT9085 Datasheet, PDF (1/20 Pages) Mitel Networks Corporation – CMOS PAC - Parallel Access Circuit

CMOS MT9085
®
PAC - Parallel Access Circuit
Features
• Configurable for parallel-to-serial or
serial-to-parallel conversion of 1024 channels
• Interfaces to Mitel’s MT9080 Switch Matrix
Module (SMX). Generates all framing signals
required in 1K or 2K switching applications
• Serial data rates of 2.048 Mbit/s or 4.096 Mbit/s
• Mitel ST-BUS™ compatible serial inputs/outputs
Applications
• Interfacing the MT9080 Switch Matrix Module to
an ST-BUS system
• Rate conversion between 4 Mbit/s and 2 Mbit/s
serial streams
• Interfacing a parallel system bus to devices
utilizing serial I/O
ISSUE 3
Ordering Information
January 1993
MT9085AP 68 Pin PLCC
-40°C to 70°C
Description
The MT9085 Parallel Access Circuit (PAC) provides
an interface between an 8 bit, parallel time division
multiplexed bus and a serial time division
multiplexed bus. A single PAC device will accept
data clocked out on the parallel bus of the Mitel
MT9080 (SMX) and output it on 32/16 time division
multiplexed serial bus streams. A second device can
be configured to perform the conversion from the
serial format into an SMX compatible parallel format.
The time division, serial multiplexed streams may
operate at 2.048 Mbit/s or at 4.096 Mbit/s. The PAC
generates all framing signals required by the SMX
for 1024 and 2048 channel configurations.
S0
S1
•
•
•
•
•
Shift
Registers
•
•
•
•
•
•
LOAD
•
•
•
C16
C4
S30
Parallel/Serial
S31
Address
Decoder
Timing
Generation
C16
C4
Mode
Control
VSS VDD
Figure 1 - Functional Block Diagram
••^P0
P7
C4i
F0i
C16i
C2o
C4o
F0o
DFPo
DFPo
CFPo
OE
MCA
MCB
CKD
2/4S
2-125