MT8940 Datasheet, PDF (1/16 Pages) Mitel Networks Corporation – ISO-CMOS ST-BUS™ FAMILY T1/CEPT Digital Trunk PLL

ISO-CMOS ST-BUS™ FAMILY MT8940
®
T1/CEPT Digital Trunk PLL
Features
• Provides T1 clock at 1.544 MHz locked to input
frame pulse
• Sources CEPT (30+2) Digital Trunk/ST-BUS
clock and timing signals locked to internal or
external 8 kHz signal
• TTL compatible logic inputs and outputs
• Uncommitted 2-input NAND gate
• Single 5 volt power supply
• Low power ISO-CMOS technology
Applications
• Synchronization and timing control for T1
and CEPT digital trunk transmission links
• ST- BUS clock and frame pulse source
ISSUE 8
Ordering Information
March 1997
MT8940AE 24 Pin Plastic DIP (600 mil)
-40°C to +85°C
Description
The MT8940 is a dual digital phase-locked loop
providing the timing and synchronization signals for
the T1 or CEPT transmission links and the ST-BUS.
The first PLL provides the T1 clock (1.544 MHz)
synchronized to the input frame pulse at 8 kHz. The
timing signals for the CEPT transmission link and the
ST-BUS are provided by the second PLL locked to an
internal or an external 8 kHz frame pulse signal.
The MT8940 is fabricated in MITEL’s ISO-CMOS
technology.
F0i
C12i
MS0
MS1
MS2
MS3
C8Kb
C16i
Ai
Bi
DPLL #1
Mode
Selection
Logic
DPLL #2
2:1 MUX
Input
Selector
Clock
Generator
Variable
Clock
Control
Frame Pulse
Control
4.096 MHz
Clock
Control
2.048 MHz
Clock
Control
Yo
V_DD
V_SS
RST
Figure 1 - Functional Block Diagram
CVb
CV
ENCV
F0b
C4b
C4o
ENC4o
C2o
C2o
ENC2o
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