MT8930B Datasheet, PDF (1/3 Pages) Mitel Networks Corporation – Subscriber Network Interface Circuit

CMOS ST-BUS™ FAMILY MT8930B
®
Subscriber Network Interface Circuit
Preliminary Information
Features
ISSUE 2
August 1993
• CCITT I.430 and ANSI T1.605 S/T interface
• Full-duplex 2B+D, 192 kbit/s transmission
• Link activation/deactivation
• D-channel access contention resolution
• Point-to-point, point-to-multipoint and star
configurations
• Master (NT)/Slave (TE) modes of operation
Ordering Information
MT8930BC 28 Pin Ceramic DIP
MT8930BE 28 Pin Plastic DIP
MT8930BP 44 Pin PLCC
-40°C to +85°C
Description
• Exceeds loop length requirements
ed ^{t • Complete loopback testing capabilities}
nd n ^{hee • On chip HDLC D-channel protocoller}
me ^{ig ta s • 8 bit Motorola/Intel microprocessor interface}
m ^{es C da • Controllerless or microprocessor-controlled}
o ^{D 0 B} operation
ec ^{w 93} 930 • Mitel ST-BUS interface
t ^{R Ne T8 T8 • Low power CMOS technology}
No for ^{M ll M • Single 5 volt power supply}
See_{y for} ^fu _Applications
tor ^{• ISDN NT1}
fac • ISDN S or T interface
ult ^{• ISDN Terminal Adaptor (TA)}
ns _{• Digital sets (TE1) - 4 wire ISDN interface}
Co _{• Digital PABXs, Digital Line Cards (NT2)}
The MT8930B Subscriber Network Interface Circuit
(SNIC) implements the CCITT I.430 and ANSI
T1.605 Recommendations for the ISDN S and T
reference points. Providing point-to-point and point-
to-multipoint digital transmission, the SNIC may be
used at either end of the subscriber line (NT or TE).
An HDLC D-channel protocoller is included and
controlled through a Motorola/Intel microprocessor
port. A controllerless mode allows the SNIC to
operate without a microprocessor.
The MT8930B is fabricated in Mitel’s CMOS process.
DSTi
DSTo
F0od
C4b
F0b
STAR/Rsto
CK/NT
Cmode
ST-BUS
Interface
Timing
and
Control
D-channel Priority
Mechanism
PLL
HDLC
Transceiver
S-Bus
Link
Interface
Link
Activation
Controller
LTx
VBias
LRx
VDD
Microprocessor Interface
VSS
Rsti HALF
AD0-7
R/W/WR,
AFT/PRI
DS/RD,
DinB
AS/ALE,
P/SC
Figure 1 - Functional Block Diagram
CS,
DReq
IRQ/NDA,
DCack
10-33