SST211DE Datasheet, PDF (1/1 Pages) Micross Components – N-Channel DMOS Switch - Zener Protected

SST211 / 213 / 215
SST211DE / SST213DE / SST215DE N-Channel DMOS Switch - Zener Protected
Description:
The SST211DE / SST213DE / SST215DE are enhancement‐mode
MOSFETs designed for high speed low‐glitch switching in audio, video
and high‐frequency applications. The family is normally used for ±5V
analog switching or as a high speed driver of the SD214. These
MOSFETs utilize lateral construction to achieve low capacitance and
ultra‐fast switching speeds. An integrated Zener diode provides ESD
protection A poly‐silicon gate is featured for manufacturing reliability.
See SST5000 and SST54000 series for quad configurations.
For non‐zener protected versions see SST210DE / SST214DE series
Features:
ƒ Ultra‐High Speed Switching—tON: 1ns
ƒ Ultra‐Low Reverse Capacitance: 0.2pF
ƒ Low Guaranteed R_DS @5V
ƒ Low Turn‐On Threshold Voltage (1.5V max)
ƒ N‐Channel Enhancement Mode
Benefits:
ƒ High‐Speed System Performance
ƒ Low Insertion Loss at High Frequencies
ƒ Low Transfer Signal Loss
ƒ Single Supply Operation & Simple Driver Requirement
Availability:
SST211DE / SST213DE / SST215DE – TO‐253 (SOT‐143)
SST211DE / SST213DE / SST215DE ‐ Bare die form
Contact Micross for full package dimensions
Pinout:
Top
View
Applications:
ƒ Fast Analog Switching
ƒ Fast Sample & Holds
ƒ Pixel‐Rate Switching
ƒ DAC Deglitchers
ƒ High‐Speed Driver
MAXIMUM RATINGS
LIMIT IN VOLTS
MAXIMUM RATINGS
LIMIT
UNIT
SST211 SST213 SST215
(Continued)
Gate‐Drain, Gate‐Source Voltage ‐30/25 ‐15/25 ‐25/30
Drain Current
50
mA
Gate‐Substrate Voltage
‐0.3/25 ‐0.3/25 ‐0.3/30
Lead Temperature (1/16” from ease, 10s)
300
°C
Drain‐Source Voltage
30
10
20
Storage Temperature
‐65 to 150 °C
Source‐Drain Voltage
10
10
20
Operating Junction Temperature
‐55 to 125 °C
Drain ‐Substrate Voltage
30
15
25
Power Dissipation
Click To Buy ^{Source‐Substrate Voltage}
15
15
25
ELECTRICAL SPECIFICATION
T_A = 25°C unless otherwise noted
SYMBOL
TEST CONDITIONS
Derate 3mW/C° above 25°C
300
LIMITS
TYP SST211DE
SST213DE
SST215DE
MIN MAX MIN MAX MIN MAX
mW
UNIT
DRAIN‐SOURCE BREAKDOWN
VOLTAGE
V_(BR)DS
V_GS = V_BS = 0V, I_D = 10µA 35 30
‐
‐
‐
‐
‐
V_GS = V_BS = ‐5V, I_D = 10nA 30 10
‐
10
‐
20
‐
SOURCE‐DRAIN BREAKDOWN
V_(BR)SD
V_GD = V_BD = ‐5V, I_S = 10nA 22 10
‐
10
‐
20
‐
VOLTAGE
V
DRAIN‐SUBSTRATE BREAKDOWN
V_(BR)DBO
V_GB = 0V, I_D = 10nA
35 15
‐
15
‐
25
‐
VOLTAGE
Source Open
SOURCE‐SUBSTRATE BREAKDOWN
VOLTAGE
V_(BR)SBO
V_GB = 0V, I_S = 10µA
Drain Open
35 15
‐
15
‐
25
‐
DRAIN‐SOURCE LEAKAGE
SOURCE‐DRAIN LEAKAGE
GATE LEAKAGE
I_DS(off)
V_GS=V_BS =‐5V V_DS = 10V 0.4
‐
10
‐
10
‐
‐
V_DS = 20V 0.9 ‐
‐
‐
‐
‐
10
I_SD(off)
V_GD =V_BD=‐5V V_SD = 10V 0.5
‐
10
‐
10
‐
‐
nA
V_SD = 20V 1
‐
‐
‐
‐
‐
10
I_GBS
V_DB = V_SB = 0V _, V_GB = 30V 0.01 ‐
100
‐
100
‐
100
THRESHOLD VOLTAGE
V_GS(th)
V_DS =V_{GS ,} I_D = 1µA, V_SB = 0V 0.8 0.5
1.5
0.1
1.5
0.1
1.5
V
V_GS = 5V 60
‐
75
‐
75
‐
75
V_GS = 10V 40
‐
50
‐
50
‐
50
DRAIN‐SOURCE‐ON RESISTANCE
R_DS(on)
V_SB = 0V
V_GS = 15V 30
‐
‐
‐
‐
‐
‐
Ω
I_D = 1mA _{VGS = 20V 26}
‐
‐
‐
‐
‐
‐
V_GS = 25V 24
‐
‐
‐
‐
‐
‐
FORWARD TRANSCONDUCTANCE
g_fs
V_DS = 10V _, V_SB = 0V
10.5 9
‐
9
‐
‐
9
mS
g_os
I_D = 20mA, f = 1kHz
0.9 ‐
‐
‐
‐
‐
9
GATE NODE CAPACITANCE
C_(GS+GD+GB)
2.5 ‐
3.5
‐
3.5
‐
3.5
DRAIN NODE CAPACITANCE
C_(GD+GB)
V_DS = 10V _, f = 1MHz
1.1 ‐
1.5
‐
1.5
‐
1.5
pF
SOURCE NODE CAPACITANCE
C_(GS+SB)
V_GS = V_BS = ‐15V
3.7 ‐
5.5
‐
5.5
‐
5.5
REVERSE TRANSFER CAPACITANCE
C_rss
0.2 ‐
0.5
‐
0.5
‐
0.5
TURN‐ON TIME
t_D(on)
0.5 ‐
1
‐
1
‐
1
t_r
V_SB = 0V_, V_IN 0 to 5V,
0.6 ‐
1
‐
1
-
1
ns
TURN‐OFF TIME
t_D(off)
R_G = 25Ω, V_DD = 5V R_L =
2
‐
‐
‐
‐
-
-
This is trial version ^tf
680Ω
6
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‐
‐
‐
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