LSU425_SOIC Datasheet, PDF (1/1 Pages) Micross Components – N-CHANNEL JFET

LSU425
HIGH INPUT IMPEDANCE
MONOLITHIC DUAL
N-CHANNEL JFET
Linear Systems replaces discontinued Siliconix U425
The LSU425 is a high input impedance Monolithic Dual N-Channel JFET
The LSU425 monolithic dual n-channel JFET is
designed to provide very high input impedance for
FEATURES
HIGH INPUT IMPEDANCE
I_G = 0.25pA MAX
differential amplification and impedance matching.
HIGH GAIN
gfs = 120µmho MIN
Among its many unique features, this series offers
operating gate current specified at -500 fA. The
LSU425 is a direct replacement for discontinued
Siliconix U425.
LOW POWER OPERATION
ABSOLUTE MAXIMUM RATINGS
@ 25°C (unless otherwise noted)
V_GS(OFF) = 2V MAX
Maximum Temperatures
The hermetically sealed TO-71 & TO-78 packages are
well suited for military applications. The 8 Pin P-DIP
and 8 Pin SOIC provide ease of manufacturing, and the
symmetrical pinout prevents improper orientation.
Storage Temperature
‐65°C to +150°C
Operating Junction Temperature
+150°C
Maximum Voltage and Current for Each Transistor – Note 1
‐V_GSS
Gate Voltage to Drain or Source
40V
(See Packaging Information).
‐V_DSO
‐I_G(f)
Drain to Source Voltage
Gate Forward Current
40V
10mA
LSU425 Applications:
Maximum Power Dissipation
Device Dissipation @ Free Air – Total
400mW @ +125°C
ƒ Ultra Low Input Current Differential Amps
ƒ High-Speed Comparators
ƒ Impedance Converters
MATCHING CHARACTERISTICS @ 25°C UNLESS OTHERWISE NOTED
SYMBOL
CHARACTERISTICS VALUE UNITS CONDITIONS
|∆V _GS1‐2 /∆T|max.
DRIFT VS.
TEMPERATURE
25 µV/°C V_DG=10V, I_D=30µA
T_A=‐55°C to +125°C
| V _GS1‐2 | max.
OFFSET VOLTAGE 15
mV V_DG=10V, I_D=30µA
ELECTRICAL CHARACTERISTICS @ 25°C (unless otherwise noted)
SYMBOL
CHARACTERISTICS
MIN.
TYP.
MAX.
UNITS
CONDITIONS
BV_GSS
Breakdown Voltage
40
60
‐‐
V
V_DS = 0
I_G =1nA
Click ^BVGGO
Gate‐To‐Gate Breakdown
40
TRANSCONDUCTANCE
Y_fSS
Full Conduction
300
Y_fS
Typical Operation
120
DRAIN CURRENT
I_DSS
Full Conduction
60
To Buy ^‐‐
‐‐
‐‐
1500
200
350
V
µmho
µmho
I_G = 1µA
V_DS = 10V
V_DG = 10V
I_D = 0
I_S= 0
V_GS = 0V f = 1kHz
I_D = 30µA f = 1kHz
‐‐
1000
µA
V_DS = 10V
V_GS = 0V
GATE VOLTAGE
V_GS(off)
Pinchoff voltage
‐‐
‐‐
2.0
V
V_DS = 10V
I_D = 1nA
V_GS
Operating Range
‐‐
‐‐
1.8
V
V_DG = 10V
I_D = 30µA
GATE CURRENT
I_Gmax.
Operating
‐‐
‐‐
.25
pA
V_DG = 10V
I_D = 30µA
‐I_Gmax.
High Temperature
‐‐
‐‐
250
pA
T_A = +125°C
I_GSSmax.
At Full Conduction
‐‐
‐‐
1.0
pA
V_DS = 0V
V_GS = 20V
‐I_GSSmax.
High Temperature
‐‐
‐‐
1.0
nA
T_A = +125°C
OUTPUT CONDUCTANCE
Y_OSS
Full Conduction
‐‐
‐‐
10
µmho
V_DS = 10V
V_GS = 0V
Y_OS
Operating
‐‐
0.1
3.0
µmho
V_DG = 10V
I_D = 30µA
COMMON MODE REJECTION
CMR
‐20 log | ∆V _GS1‐2/ ∆V_DS|
‐‐
90
‐‐
dB
∆V_DS = 10 to 20V I_D = 30µA
‐20 log | ∆V _GS1‐2/ ∆V_DS|
‐‐
90
‐‐
dB
∆V_DS = 5 to 10V I_D = 30µA
NOISE
V_DG = 10V I_D = 30µA R_G = 10MΩ
NF
Figure
‐‐
‐‐
1
dB
f = 10Hz
e_n
Voltage
‐‐
20
70
nV/√Hz
V_DG = 10V I_D = 30µA f = 10Hz
‐‐
10
‐‐
V_DG = 10V I_D = 30µA f = 1KHz
CAPACITANCE
C_ISS
Input
‐‐
‐‐
3.0
pF
V_DS= 10V V_GS = 0 f = 1MHz
C_RSS
Reverse Transfer
‐‐
‐‐
1.5
pF
Note 1 – These ratings are limiting values above which the serviceability of any semiconductor may be impaired
Available Packages:
TO-71 / TO-78 (Top View)
P-DIP / SOIC (Top View)
LSU425 in TO-71 & TO-78
LSU425 in PDIP & SOIC
LSU425 available as bare die
Please contact Micross for full package and die dimensions
Email: [e-mail]
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