LSK489 Datasheet, PDF (1/1 Pages) Linear Integrated Systems – LOW NOISE LOW CAPACITANCE MONOLITHIC DUAL N-CHANNEL JFET AMPLIFIER

LSK489
e_n = 1.8nV√Hz, C_iss = 4pF, MONOLITHIC DUAL N-CHANNEL JFET
Description:
The LSK 489 high performance monolithic dual JFETs features
extremely low noise, tight offset voltage and low drift over
temperature specifications, and is targeted for use in a wide
range of precision instrumentation applications.
LSK489 removes significant cost for test screening time needed
to match IDSS on 2 individual JFETS and offers ZERO yield loss.
LSK489 On-Chip IDSS matching gives closest possible
synchronous electrical performance and also offers better
matched performance when the chip is subjected to
temperature.
Features:
 Reduced Noise due to process improvement
 Monolithic Design
 High slew rate & high CMRR 102dB
 Low offset/drift voltage
 Low gate leakage I_GSS & I_G
Benefits:
 Tight differential match vs. current
 Improved op amp speed settling time accuracy
 Minimum Input Error trimming error voltage
 Lower intermodulation distortion
Availability:
LSK489 – TO-71 hermetic package
LSK489 – SOIC-A
LSK489 – SOT-23, 6 lead
LSK489 – BARE DIE
Contact Micross for full package dimensions
Applications:
 Wide band differential Amps
 High speed temperature compensated single ended input
amplifiers
 High speed comparators
 Impedance convertors
 High-Speed Driver
ABSOLUTE MAXIMUM RATING¹ @ 25°C (unless otherwise stated)
Pinout:
Storage Temperature
-55 to +150°C
Con_G^Jtuin_aM^nu_t^c_eAPot-^ioXuo_Dws^In_rMPe_a^{OroUinpwDM,eiers}_Gras^R_itaDpi^Atnia_es^Tgts_-i^Ii_SoT^Npne_oa^Gm,t_uti^So_r^po_cnet_ea,ralp5^teurreside4_{SD±24100VDE}
L^-5IM⁵ I^tT^{o +150°C}
300_Sm_DW_214DE
500mW_±40V
Gate_VF_oo_ltr_aw_ga_erd Current
I_G(F) = 10mA
Gate^G-^aS^teub^tost^Sra^oute^rcV^eo^Vlt^oa^ltg^ae^ge
±30V ^VGSO ^{= 6}±⁰3^V0V
Dra^Gin^a-^tS^eo^tu^or^Dce^raVⁱⁿo^Vlt^oa^lg^tae^ge
30V ^VGDO ^{= 6}2^0V0V
MAXIMUM RATINGS
Drain Current
Lead Temperature
Storage Temperature
LIMIT
50
300
-65 to 150
UNIT
mA
°C
°C
Source-Drain Voltage
10V
20V
Operating Junction
-55 to 125
°C
MATCHING CHARACTERISTICS, T_A = 25°C unless otherwise noted
Temperature
Drain -Sub_Cs_Htr_Aa_Rte_ACV_To_Elt_Ra_Ig_STe_IC
30V
SYMBO²L^5V MIN TYP ^PoweM^rA^DX^issipaU^tiN^oIⁿTS
300 _CONDITIONS mW
S_Do_IFu_Fr_Ec_Re_E-_NS_Tu_Ib_As_Lt_Gra_Ate_TEV_To_Olta_SOge_{URCE CUTOF}1_F5V _{|VGS1 - V}2_G5_S2V_|
-
-
20
mV
V_DS = 10V, I_D = 1mA
VOLTAGE
G^EAT^LE^ET^CO^TS^RO^ICU^ARC^LE^SS^PAT^EU^CR^IFAT^ICIO^AN^TC^IOU^NRRENT RATIO
I_DSS1
0.9
-
COM^PM^AO^RN^AM^MO^ED^TE^ER^REJECTION RATIO^SYOMLB
CIM^DSTR^S2ER^{ST CON}9^D5^ITIONS102
DRAIN-SOURCE BREAKDOWN
VO^NL^OT^IA^SEG^VE^OLTAGE
V(BR)DS
VVGG^eSSⁿ==
VBS = 0V^-, ID = 10¹Âµ^.8A
VBS = -5V_- , ID = 10₂n_.8A
SOURCE-DRAIN BREAKDOWN V(BR)SD
VGD = VBD = -5V, IS = 10nA
COMMON^VS^OO^LU^TR^AC^GE^EINPUT CAPACITANCE
ELECT^CBBR^OSRRI^DMOC^EEA^RUMAAL^ARKKOC^ICDDNNH^EOOA^-SSR^-OWWCSUA^UAUNNBC^RPT^BSCAVVE^SETCR^OOITRRI^TS^LLREAAT^TTVNAI^TAAC^ECTERS^GGEES@^EEE
TRANSF^VE⁽R^BR)DBO
25°C un^Vl⁽e^Bs^Rs^)So^Bt^Oherwise
CC_RIS^V_SSS^GB_S=ou0rVce,
-
IOD_- =pe1n0nA
no^Vte^Gd^B
= 0V,
Drain
IS = 10µA
Open
4
-
1.0
-
LIMIT^VS^{DS = 10V, VGS = 0V}
-^TYP d_MB^SIND210DMEAV_XDG = 1_M0^SIV_NDto²¹2⁴0_MDV_A,^EXI_D = 200^UµA^NIT
2.0₃₅
30
V_DS = 15V, I_D = 2mA, f = 1kHz
nV / √Hz
NBW = 1Hz
3.5³⁰
10
22
10
V_DS
=
15²²V⁰⁰_{N, BIDW=}
2mA,
= 1Hz
f
=
10Hz
8
3 ³⁵ pF¹⁵
V
V_DS = 15V²,⁵I_D = 500µA, f = 1MHz
35
15
25
DRAIN-SOU^CHR^AC^RE^ACL^TE^EA^RK^ISA^TIG^C E
IDS(off)
V^SG^YS^M=^BOV^LBS = -5V^MIN VDS^T=^YP10V ^MA0^X.4 ^UNITS
10
CONDITIONS
GATE TO SOURCE BREAKDOWN VOLTAGE
BV_GSS
-60 V_DS =- 20V - 0.9 V
V_DS = 0, I_D1=0-1nA nA
SGOAUTRE CTOE-GDARTAE IBNRELAEKADKWAOGNEVOLTAGIESD(off)
VV₍G_BRD_{) G}=₁ V_{– G}B₂D = -5V±30 VSD±=4510V - 0.5
V
I_G1=0±1µA, I_D = I_S = 0 A (Open Circuit)
GATE TO SOURCE PINCH-OFF VOLTAGE
V_{GS (OFF)}
-1.5 VSD =- 20V -3.50.8 V
V_DS = 15V, 1I_D0= 1nA
GATE^GTO^ATS^EOU^LR^EC^AE^KO^AP^GER^EATING VOLTAG^IEGBS
DRTAHINRTEOSSHOOULRDCEVSOALTUTRAAGTEION CURREVN_GT_S(th)
VD_VB_G=_S VSB = 0V_-0, V_.5GB = ±4_-0V
VDISDS=S2VGS , ID = 12µ.5A, VSB =50V
-3⁰.5^.001 V
150.8 m0A.5
0.1 _{VDS = 15V, I}0_D .₌1_500µA V
1.5 V0DG.1= 15V,1.V5GS = 0
GATE OPERATING CURRENT
I_G
- _VGS-₌2 _5V -25₅₈ pA
- _VGS-₌0.8_10V -10₃₈ nA
GADTREATIONS-SOOURUCRECLEEA-OKANGE CURRENRT _DS(on) V_SB =I_G0_SSV_, I_D = 1mA- _{VGS =}- _15V -100₃₀ pA
70 ^{VDG = 15V, ID}7⁼0 ^200µA
45
45 ^TA ^{= 25°C}
V_DG = -15V, V_DS = 0V ^Ω
FULL CORNEDUSCISTTIOANNTCREANSCONDUCTANCE
G_fs
1500 V_GS =- 20V - 26
V_DG = -15V, V_GS = 0, f = 1kHz
TRANSCONDUCTANCE
1000 V_GS1=50205V - 24 µS
V_DG = 15V, I_D = 500µA
FULLDOYUNTAPMUTICCONDUCTANCE
G_OS
-
-
35
V_DG = 15V, V_GS = 0V
O^FU^OT^RPU^WT^AC^RO^DNDUCTANCE
TRANSCO_NN_OD_IU_SEC_FT_IGA_UN_RC_EE
NF
SD210DE / SD214DE - Bare die and wafer form, contact
-
0.2
2
-
-
0.5
dB
V_DG = 15V, I_D = 200µA
V_DS = 15V, V_GS = 0V, R_G = 10MΩ
f = 100Hz, NBW = 6Hz
NMoteic1r-oAsbssoluftoe rMfauximlludmaRtaatinsghs aereeltimaitinngdvadluiems aebonvse iwohnichsserviceability may be impaired, Note 2 - Pulse width ≤2ms, Note 3 - All MIN/TYP/MAX Limits are absolute values. Negative signs indicate electrical
polarity only, Note 4 - Derate 2.4mW/°C above 25°C, Note 5 - Derate 4mW/°C above 25°C
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