LS350 Datasheet, PDF (1/1 Pages) Micross Components – Linear Systems Monolithic Dual PNP Transistor

LS350
MONOLITHIC DUAL
PNP TRANSISTOR
Linear Systems Monolithic Dual PNP Transistor
The LS350 is a monolithic pair of PNP transistors
mounted in a single P-DIP package. The monolithic
dual chip design reduces parasitics and gives better
performance while ensuring extremely tight matching.
The 8 Pin P-DIP provides ease of manufacturing, and
the symmetrical pinout prevents improper orientation.
(See Packaging Information).
LS350 Features:
ƒ Very high gain
ƒ Tight matching
ƒ Low Output Capacitance
FEATURES
HIGH GAIN
TIGHT V_BE MATCHING
HIGH f_t
ABSOLUTE MAXIMUM RATINGS ¹
@ 25°C (unless otherwise noted)
Maximum Temperatures
Storage Temperature
Operating Junction Temperature
Maximum Power Dissipation
Continuous Power Dissipation (One side)
Continuous Power Dissipation (Both sides)
Linear Derating factor (One side)
Linear Derating factor (Both sides)
Maximum Currents
Collector Current
h_FE ≥ 100 @ 10µA‐1mA
|V_BE1 – V_BE2 |= 0.1mV TYP.
275MHz TYP. @ 1mA
‐65°C to +200°C
‐55°C to +150°C
250mW
500mW
2.3mW/°C
4.3mW/°C
10mA
MATCHING CHARACTERISTICS @ 25°C (unless otherwise stated)
SYMBOL
CHARACTERISTIC
MIN TYP MAX UNITS CONDITIONS
|V_BE1 – V_BE2 |
Base Emitter Voltage Differential
‐‐
1
5
mV
I_C = 10µA, V_CE = 5V
∆|(V_BE1 – V_BE2)| / ∆T
|I_B1 – I_B2 |
Base Emitter Voltage Differential
Change with Temperature
Base Current Differential
‐‐
2
20
µV/°C
I_C = 10µA, V_CE = 5V
T_A = ‐55°C to +125°C
‐‐
‐‐
‐‐
nA
I_C = 10µA, V_CE = 5V
Click |∆ (IB1 – IB2)|/°C
h_FE1 /h_FE2
Base Current Differential
Change with Temperature
DC Current Gain Differential
ELECTRICAL CHARACTERISTICS @ 25°C (unless otherwise noted)
To^‐‐
‐‐
‐‐
10
Buy ^‐‐
nA/°C
I_C = 10µA, V_CE = 5V
T_A = ‐55°C to +125°C
‐‐
%
I_C = 10µA, V_CE = 5V
SYMBOL
CHARACTERISTICS
MIN.
TYP.
MAX. UNITS
CONDITIONS
BV_CBO
Collector to Base Voltage
25
‐‐
‐‐
V
BV_CEO
Collector to Emitter Voltage
25
‐‐
‐‐
V
BV_EBO
Emitter‐Base Breakdown Voltage
6.2
‐‐
‐‐
V
BV_CCO
Collector to Collector Voltage
30
‐‐
‐‐
V
100
‐‐
‐‐
h_FE
DC Current Gain
100
‐‐
‐‐
I_C = 10µA, I_E = 0
I_C = 10µA, I_B = 0
I_E = 10µA, I_C = 0²
I_C = 10µA, I_E = 0
I_C = 10µA, V_CE = 5V
I_C = 100µA, V_CE = 5V
100
‐‐
‐‐
I_C = 1mA, V_CE = 5V
V_CE(SAT)
Collector Saturation Voltage
‐‐
‐‐
0.5
V
I_C = 1mA, I_B = 0.1mA
I_EBO
Emitter Cutoff Current
‐‐
‐‐
0.2
nA
I_E = 0, V_CB = 3V
I_CBO
Collector Cutoff Current
‐‐
‐‐
0.2
nA
I_E = 0, V_CB = 20V
C_OBO
Output Capacitance
‐‐
‐‐
2
pF
I_E = 0, V_CB = 5V
C_C1C2
Collector to Collector Capacitance
‐‐
‐‐
2
pF
V_CC = 0V
I_C1C2
Collector to Collector Leakage Current
‐‐
‐‐
0.5
nA
V_CC = ±45V
f_T
Current Gain Bandwidth Product
200
‐‐
‐‐
MHz
I_C = 1mA, V_CE = 5V
NF
Narrow Band Noise Figure
‐‐
‐‐
3
dB
I_C = 100µA, V_CE = 5V, BW=200Hz, R_G= 10KΩ,
f = 1KHz
Notes:
1. Absolute Maximum ratings are limiting values above which serviceability may be impaired
2. The reverse base‐to‐emitter voltage must never exceed 6.2 volts; the reverse base‐to‐emitter current must never exceed 10µA.
P-DIP (Top View)
Available Packages:
LS350 in P-DIP
LS350 available as bare die
Please contact Micross for full package and die dimensions:
Email: [e-mail]
Web: www.micross.com/distribution.aspx
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