AS28F128J3A Datasheet, PDF (1/15 Pages) Micross Components – NOR Cell Architecture

Austin Semiconductor, Inc.
PE_PEM_M
AS28AFS2182F812J83J3AM
Q-F^Ql^-a^Fs^lah^sh
Plastic Encapsulated Microcircuit
P1l2a8sMticb,Exn8caanpdsux1la6teQd-FMLiAcSroHciMrceumitory
PIN ASSIGNMENT
1E2v8eMn Sbe,cxt8oraedn,dSxin1g6leQB-iFt LpeArSCHellMArecmhiotrecyture
E_Fv_Een_ATSe_Uc_Rto_Ere_Sd, Single Bit per Cell Architecture
F^•eatu¹⁰r⁰e^%s ^{Pin and Function compatible to Intel’s MLC Family}
• NOR Cell Architecture
•^• 10²0^.7%^VP^ti^on³a^.n⁶d^VF^Vun^Cc^Ction compatible to Intel’s MLC Family
•^• N²O^.7R^VC^te^oll³A^.6r^Vchi^ot^rec⁵t^Vure^{VPEN (Programming Voltage)}
•^• 2.^A7V^sytⁿo^c3^h.^r6^oV^noV^uC^s C^{Page Mode Reads}
•^• 2.^M7V^anto^uf3^a.^c6^tV^ureo^rr^’5^sV^IDV^CPE^odN^e:(Programming Voltage)
• A^sync^Nhr^uo^mno^ouⁿs^yP^xa⁰g^xe⁸M^9hode Reads
•^• M^Iaⁿn^du^uf^sa^tc^rt^yur^Se^tr^a’ⁿs^dI^aD^rdC^Podⁱⁿe^-:^Out
• FulMlyTc2o8mF1p2at8iJb3leMTRTGL Input aMnidcrOonutputs 0x2Ch
123 456 78
A
A1 A6
B
A2 VSS
C
A3
A7
D
A4 A5
E
DQ8 DQ1
F
BYTE\ DQ0
G
A23 A0
A8 VPEN A13
A9 CE0 A14
A10 A12 A15
A11 RP\ DNU
DQ9 DQ3 DQ4
DQ10 DQ11 DQ12
DQ2 VCCQ DQ5
VCC A18
DNU A19
DNU A20
DNU A16
DNU DQ15
DNU DNU
DQ6 DQ14
A22
CE1
A21
A17
STS
OE\
WE\
•• InCdousmtrmy oSntaFnldaasrhd IPnitne-rOfaucte [CFI]
•• FuSlclyalcaobmlepCatoibmlemTaTndL SInept ut and Outputs
H
CE2 DNU VCC VSS DQ13 VSS DQ7 DNU
•• CAomutmomonaFtilcasWh RInItTeErfaacned[CEFRIA] SE Algorithms
•_• Sc₅a_.6la_ub_sle_peC_ro_Bm_ym_tean_ed_ffS_ece_{tive programming time}
•_• A₁u₂to₈m_ba_itic_prW_otR_ecI_tT_ioE_na_rn_ed_gE_isR_teA_r SE Algorithms
• 5._6us p₆e₄r_-bB_iy_tt_ue_ne_if_qf_uec_eti_dv_ee_vp_icr_eog_ir_da_em_ntm_ifin_eg_r time
• 12_8 bi₆t ₄p_-r_bot_ie_t c_ut_sio_en_{r p}re_rogi_gs_rt_ae_mr _{mable OTP cells}
•
•
_ESench66_{ua44rn--ibbctyiiettdOuusndTeia}q_Prtu_apber_plood_rgocer_kv_taeimc_fcee_tmiaoi_tadunberlfn_eeeti_aOfti_uTerrP_e
with
cells
use
of
VPEN=VSS
•_• E₁nh₀a₀n_,0c₀ed₀ d_Ea_Rta_Ap_Sr_Eote_cc_yt_cio_len_sf_pea_et_ru_Bre_Lw_Oi_Cth_Kuse of VPEN=VSS
A22
CE1
A21
A20
A19
1
2
3
4
5
•_• Se_Ac_uu_tr_oit_my _aO_tiT_cP_Sb_ul_so_pc_ek_nf_dea_Otu_pr_te_ions:
•
•
10_0,00_B0_loE_cR_kA_ES_RE_Ac_Syc_Ele_Ss_Up_Ser_PB_EL_NO_DC_-tK_o-READ
A_{}utoBBmll_BPooaRltcc_oikk_Oc_cEEkS_GuRR_ERsAA_Rp_AeSS_AMnEE_SdSS_ESOUU_USpSS_St_UiPP_Po_SEEnEPNNsN:_{EDDDN---ttDooto----PRtRoRE-EOPAARGDDORGARMAM}
A18
6
A17
7
A16
8
VCC
9
A15
10
A14
11
A13
12
• _Av_Pai_Rla_Ob_Gle_RO_Ap_Mera_St_Uin_Sg_PR_Ea_Nn_Dg_-e_ts_o:_-READ
• A^vaila^Ebⁿle^hO^anp^ce^er^dating Rang^[-e^Es:^{T] -40oC to +105oC}
A12
13
CE0
14
VPEN
15
^ En^Mha^iln^-c^Te^ed^mperatur[^e-E^[T^-X] ^T]-40^-o5C^5oto^C+^to10⁺5^1oC^25oC
RP\
16
A11
17
 Mil-Temperature [-XT] -55^oC to +125^oC
A10
18
For in-depth functional product detail and Timing Diagrams,
A9
A8
19
20
please reference Numonyx’s full product Datasheet:
For in-depth functional product detail and Timing Diagrams,
VSS
21
A7
22
A6
23
pl_Ee_Mas_Be _Ere_Dfe_Dre_En_Dce_FM_LAicr_So_Hn’_Ms f_Eu_Mll p_Or_Ro_Ydu₍c_Jt₃D_-6a₅ta_ns_mhe₎et:
Dated: March 2010
MT28F640J3 Rev. L Dated 04/16/04
A5
24
A4
25
A3
26
A2
27
A1
28
64-Ball FBGA
56
NC
55
WE\
54
OE\
53
STS
52
DQ15
51
DQ7
50
DQ14
49
DQ6
48
VSS
47
DQ13
46
DQ5
45
DQ12
44
DQ4
43
VCCQ
42
VSS
41
DQ11
40
DQ3
39
DQ10
38
DQ2
37
VCC
36
DQ9
35
DQ1
34
DQ8
33
DQ0
32
A0
31
BYTE\
30
A23
29
CE2
General Description
GENERAL DESCRIPTION
A_MSI_i’_cs_r,_oA_ssS_'2_A8F_S1₂2₈8_FJ₁3₂M_8JE₃n_Aha_Enc_ne_hd_ano_cr _eM_dil_o-T_r e_Mm_ip_l-v_Ta_er_mia_pnt _vo_af_rM_iai_nc_tro_on_f’s _T^T_h^hi_i^s_{s d}^d_e^e_v^v_i^ic_c^e_{e f}^f_e^e_a^a_t^t_u^ur_r^e_e^s_{s i}ⁱ_nⁿ_-^-_s^sy_y^s_s^t_t^e_e^m_m ^b_b^l_l^o_o^c_c^k_{k l}^l_o^oc_c^k_kⁱ_iⁿ_n^g_g^._{. T}^T_h^h_e^e_y^y _a^a_l^l_s^s_o^o _h^h_a^a_v^v_e^{e a}
Q_N-F_ul_mas_oh_nyfa_xm_’sily_Q-o_Ff_lad_se_hvic_fe_as_m, _ii_ls_y a_ofno_dn_ev_vo_il_ca_eti_sl_,e,_isel_aec_ntr_oic_na_vll_oy_lab_tl_io_lec_,k-
e_era_les_ca_tb_rl_ie_ca(_lF_lyLA_blS_oH_ck),_-ep_rr_ao_sg_ar_ba_lm_e m_(Fa_Lb_Ale_Sm_He₎m_{, p}o_rr_oy_gd_rae_mvi_mce_abm_lean_muf_ea_mct_ou_rr_yed
uco_dtosrei_encn8_vthg,a3_{inic8noe8iMlno,6gm}i_gc0_yr_a18.o_n3nbT4u’y,_hfs2t_{aie1scs70dt,(u}._{e71xrv251ei8u6cd}m)_{eb.ucitosTspinhn}ro_toe_agrcigdnea_Neisn_{nvsuigizmce1etdeo3}ci_4nsah,ysn2uxo_1ne’l_7iisotf_{,hog70ery2mr.}._{811l5by6iu,ts7s}T_me7och7tri_{posg,2rra1eon}dd8_cie_zewv(esxidisc8the)
aa^Ction_l^o_gdC_bmeooepr^mmi_eutnohsm_dnemedo^Fn_snfLto,t^AFo_rJESL_ebnHDAe_tiES^Ir_u^neCHs^tef_eIardIDfmn^a-tf^ciie_loneir_erdf^[sea^C_epc_on^Fee_ft^In_i^]d_rd[e^teC_ehvnaFf_ittacI_emwp]_sei.ti^rthl_hmiaTe^ifts_htosep_rowse_sf^or_oafmd_rftdtwewivt^aas_ai^rn_credeseo^a_siblf._sgatw^odc_T^rkea^ivw_h^tr^hiee_acmreds-
s_co_of_mtw_paa_tr_ie_bii_ls_itd_y.evice-independent, JEDEC ID-independent with
forward and backward compatibility.
o^an^se^eh^itu^hn^ed^rr¹ed^6,a⁷n⁷d^7,t²w¹e⁸nt⁽y^x8e⁾ig^oh^rt⁸1^,2³8⁸K^8,B⁶⁰E⁸R^bA^yS^teE^{s (}b^xlo¹c⁶k⁾s^. .^{The device}
is uniformly sectored with one hundred and twenty eight 128KB
ERASE blocks.
AS28F128J3MRG
Revision 5.0 11/23/04
AS28F128J3A
Rev. 5.8 8/13
Austin Semiconductor, Inc. reserves the right to change products or modify product specifications with appropriate notification
For Additional Products and Information visit out Web site at www.austinsemiconductor.com
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Micross Components reserves the right to change products or specifications without notice.
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