A3P1000-FG484 Datasheet, PDF (2/220 Pages) Microsemi Corporation – High Capacity - 15 k to 1 M System Gates, Up to 144 kbits of True Dual-Port SRAM

ProASIC3 Flash Family FPGAs
I/Os Per Package ¹
ProASIC3
Devices
Cortex-M1
Devices
A3P015² A3P030 A3P060 A3P125
A3P250 ³
A3P400 ³
A3P600
A3P1000
M1A3P250 ^3,5
I/O Type
M1A3P400 ³
M1A3P600
M1A3P1000
Package
QN48
–
34
–
–
–
–
–
–
–
–
–
QN68
QN132⁵
49
49
–
–
–
–
–
–
–
81
80
84
87
19
–
–
–
–
–
–
–
–
CS121
–
–
96
–
–
–
–
–
–
–
–
–
VQ100
–
77
71
71
68
13
–
–
–
–
–
TQ144
–
–
91
100
–
–
–
–
–
–
–
–
PQ208
–
–
–
133
151
34
151 34 154 35 154 35
FG144
FG256^5,6
FG484⁶
–
–
96
97
97
24
97
25
97
25
97
25
–
–
–
–
157
38
178 38 177 43 177 44
–
–
–
–
–
–
194 38 235 60 300 74
Notes:
1. When considering migrating your design to a lower- or higher-density device, refer to the ProASIC3 FPGA Fabric User’s Guide
to ensure complying with design and board migration requirements.
2. A3P015 is not recommended for new designs.
3. For A3P250 and A3P400 devices, the maximum number of LVPECL pairs in east and west banks cannot exceed 15. Refer to
the ProASIC3 FPGA Fabric User’s Guide for position assignments of the 15 LVPECL pairs.
4. Each used differential I/O pair reduces the number of single-ended I/Os available by two.
5. The M1A3P250 device does not support FG256 or QN132 packages.
6. FG256 and FG484 are footprint-compatible packages.
Table 1 • ProASIC3 FPGAs Package Sizes Dimensions
Package
CS121 QN48 QN68 QN132
Length × Width
(mm \ mm)
6×6
6×6
8×8
8×8
Nominal Area
(mm²)
36
36
64
64
Pitch (mm)
0.5
0.4
0.4
0.5
Height (mm)
0.99
0.90
0.90
0.75
VQ100
14 × 14
196
0.5
1.00
TQ144
20 × 20
400
0.5
1.40
PQ208
28 × 28
784
0.5
3.40
FG144
13 × 13
169
1.0
1.45
FG256
17 × 17
289
1.0
1.60
FG484
23 × 23
529
1.0
2.23
II
Revision 13