A2F500M3G-FGG256I Datasheet, PDF (174/197 Pages) Microsemi Corporation – SmartFusion Customizable System-on-Chip (cSoC)

Pin Descriptions
FG484
Pin Number
J19
J20
J21
J22
K1
K2
A2F200 Function
GCA0/IO28NDB1V0
GCA1/IO28PDB1V0
GCC1/IO26PPB1V0
GCB1/IO27PDB1V0
GND
EMC_DB[0]/GEA2/IO59NDB5V0
A2F500 Function
GCA0/IO36NDB1V0 *
GCA1/IO36PDB1V0 *
GCC1/IO35PPB1V0
GCB1/IO34PDB1V0
GND
EMC_DB[0]/GEA2/IO76NDB5V0
K3
EMC_DB[1]/GEB2/IO59PDB5V0
EMC_DB[1]/GEB2/IO76PDB5V0
K4
NC
K5
EMC_DB[2]/IO60NPB5V0
K6
NC
K7
GND
IO74PPB5V0
EMC_DB[2]/IO77NPB5V0
IO75PDB5V0
GND
K8
VCC
VCC
K9
GND
GND
K10
VCC
K11
GND
K12
VCC
K13
GND
VCC
GND
VCC
GND
K14
VCC
VCC
K15
GND
K16
VCCFPGAIOB1
K17
NC
K18
GDA1/IO31PDB1V0
K19
GDA0/IO31NDB1V0
GND
VCCFPGAIOB1
IO37NDB1V0
GDA1/IO40PDB1V0
GDA0/IO40NDB1V0
K20
GDC1/IO29PDB1V0
GDC1/IO38PDB1V0
K21
GDC0/IO29NDB1V0
K22
GND
L1
NC
L2
NC
GDC0/IO38NDB1V0
GND
IO73PDB5V0
IO73NDB5V0
L3
NC
IO72PPB5V0
L4
GND
GND
L5
NC
L6
NC
L7
VCCFPGAIOB5
L8
GND
IO74NPB5V0
IO75NDB5V0
VCCFPGAIOB5
GND
Notes:
1. Shading denotes pins that do not have completely identical functions from density to density. For example, the bank
assignment can be different for an I/O, or the function might be available only on a larger density device.
2. *: Indicates that the signal assigned to the pins as a CLKBUF/CLKBUF_LVPECL/CLKBUF_LVDS goes through a
glitchless mux. In order for the glitchless mux to operate correctly, the signal must be a free-running clock signal. Refer
to the ’Glitchless MUX’ section in the SmartFusion Microcontroller Subsystem User’s Guide for more details.
5-60
Revision 12