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NX2601 Datasheet, PDF (15/25 Pages) Microsemi Corporation – DUAL SYNCHRONOUS PWM CONTROLLER WITH NMOS LDO CONTROLLER & 5V BIAS REGULATOR
NX2601
frequency capacitor such as high quality POSCAP es-
pecially ceramic capacitor, 20% up 100% (for ceramic)
more capacitors have to be chosen since the ESR of
capacitors is so low that the PCB parasitics can affect
the results tremendously. More capacitors have to be
selected to compensate these parasitic parameters.
Compensator Design
Due to the double pole generated by LC filter of the
power stage, the power system has 180o phase shift ,
and therefore, is unstable by itself. In order to achieve
accurate output voltage and fast transient response,
compensator is employed to provide highest possible
bandwidth and enough phase margin.Ideally,the Bode
plot of the closed loop system has crossover frequency
between1/10 and 1/5 of the switching frequency, phase
margin greater than 50o and the gain crossing 0db with -
20db/decade. Power stage output capacitors usually
decide the compensator type. If electrolytic capacitors
are chosen as output capacitors, type II compensator
can be used to compensate the system, because the
zero caused by output capacitor ESR is lower than cross-
over frequency. Otherwise type III compensator should
be chosen.
where FZ1,FZ2,FP1 and FP2 are poles and zeros in
the compensator. Their locations are shown in figure 15.
The transfer function of type III compensator is
given by:
[ ] Ve
VOUT
=
sR2
1
×(C2
+
C1)
×
(1+ sR4 ×C2)×
(1+
sR4
×
C2
C2
×
+
1+ s(R2 + R3)×C3
C1
C1
)
×
(1+
sR3
×
C3
)
Vout
Zf
Zin
C1
R3
R2
C2 R4
C3
Fb
Ve
R1
Vref
A. Type III compensator design
For low ESR output capacitors, typically such as
Sanyo OSCON and POSCAP, the frequency of ESR zero
caused by output capacitors is higher than the cross-
over frequency. In this case, it is necessary to compen-
sate the system with type III compensator. The follow-
ing figures and equations show how to realize the type III
compensator by voltage mode amplifier.
FZ1
=
2×
π
1
× R4
× C2
FZ2
=
1
2 × π × (R2 + R3 ) × C3
FP1
=
2×
π
1
× R3
×
C3
FP2
=
1
2× π ×R4 ×
C1 × C2
C1 + C2
...(11)
...(12)
...(13)
...(14)
Rev. 2.3
12/01/06
power stage
FLC
40dB/decade
loop gain
compensator
FESR
20dB/decade
FZ1 FZ2
FO FP1 FP2
Figure 15 - Type III compensator and its bode plot
15