CIP3250A Datasheet, PDF (2/44 Pages) Micronas – Component Interface Processor

CIP 3250A
Contents
Page
Section
4
1.
4
1.1.
4
1.2.
7
2.
7
2.1.
7
2.2.
7
2.3.
7
2.4.
8
2.5.
8
2.6.
8
2.7.
8
2.7.1.
9
2.7.2.
9
2.8.
10
2.9.
10
2.9.1.
11
2.10.
11
2.11.
13
2.12.
14
2.12.1.
14
2.12.2.
14
2.12.3.
15
2.12.4.
15
2.12.5.
15
2.13.
15
2.14.
15
2.15.
16
2.16.
27
3.
27
3.1.
27
3.2.
30
3.3.
32
3.4.
33
3.5.
35
3.6.
35
3.6.1.
35
3.6.2.
36
3.6.3.
36
3.6.3.1.
36
3.6.3.2.
36
3.6.3.3.
37
3.6.3.4.
37
3.6.3.5.
38
3.6.3.6.
38
3.6.3.7.
39
3.6.3.8.
39
3.6.3.9.
Title
Introduction
Block Diagram
System Configurations
Functional Description
Analog Front End
Clamping
Matrix
YUV Control (on RGB-path only)
Delay Adjustment
Skew Filter
Fast Blank Processing
Soft Mixer
Fast Blank Monitor
FSY Front Sync and AVI Active Video In
Digital Input Formats
The Chroma Demultiplexers
YUVin Interpolator (LPF 4:4:4)
YUV Output Low-pass Filter 4:2:2 and 4:1:1
Selectable RGB/YUV Output Formats
DIGIT 2000 4:1:1 Output Format
DIGIT 2000 4:2:2 Output Format
DIGIT 3000 Orthogonal 4:2:2 Output Format
Orthogonal 4:1:1 Output Format
YUV Output Levels
I/O Code Levels
AVO Active Video Output
PRIO Interface
I²C Serial Bus Control
Specifications
Outline Dimensions
Pin Connections and Short Descriptions
Pin Descriptions
Pin Configuration
Pin Circuits
Electrical Characteristics
Absolute Maximum Ratings
Recommended Operating Conditions
Characteristics
Characteristics Standby Input
Characteristics Test Input
Characteristics Reset Input
Characteristics Main Clock Input
Characteristics Active Video Output
Characteristics Active Video Input
Characteristics Fsync Input
Characteristics I²C Bus Interface Input/Output
Characteristics Luma/Chroma Input
2
ADVANCE INFORMATION
Micronas