M25P32-VMW3TGB Datasheet, PDF (33/50 Pages) Micron Technology – Micron M25P32 Serial Flash Embedded Memory

Micron M25P32 Serial Flash Embedded Memory
Power-Up/Down and Supply Line Decoupling
Power-Up/Down and Supply Line Decoupling
At power-up and power-down, the device must not be selected; that is, chip select (S#)
must follow the voltage applied on V_CC until V_CC reaches the correct value:
• V_CC(min) at power-up, and then for a further delay of t_VSL
• V_SS at power-down
A safe configuration is provided under the SPI modes heading, beginning with SPI
Modes (page 9).
To avoid data corruption and inadvertent write operations during power-up, a power-
on-reset (POR) circuit is included. The logic inside the device is held reset while V _CC is
less than the POR threshold voltage, V_WI – all operations are disabled, and the device
does not respond to any instruction. Moreover, the device ignores the following instruc-
tions until a time delay of t_PUW has elapsed after the moment that V_CC rises above the
V_WI threshold:
• WRITE ENABLE,
• PAGE PROGRAM
• SECTOR ERASE
• BULK ERASE
• WRITE STATUS REGISTER
However, the correct operation of the device is not guaranteed if, by this time, V_CC is still
below V_CC(min). No WRITE STATUS REGISTER, PROGRAM, or ERASE instruction
should be sent until:
• t_PUW after V_CC has passed the V_WI threshold
• t_VSL after V_CC has passed the V_CC(min) level.
If the time, t_VSL, has elapsed, after V_CC rises above V_CC(min), the device can be selected
for READ instructions even if the t_PUW delay has not yet fully elapsed.
V_PPH must be applied only when V_CC is stable and in the V_CCmin to V_CCmax voltage
range.
PDF: 09005aef84566541
m25p32.pdf - Rev. M 9/11 EN
33
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