M25P128-VMF6TPB Datasheet, PDF (32/47 Pages) Micron Technology – 128-Mbit, low-voltage, serial flash memory with 54-MHz SPI bus interface

Power-up and power-down
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Power-up and power-down
M25P128
At Power-up and Power-down, the device must not be selected (that is Chip Select (S) must
follow the voltage applied on V_CC) until V_CC reaches the correct value:
„ V_CC(min) at Power-up, and then for a further delay of t_VSL
„ V_SS at Power-down
Usually a simple pull-up resistor on Chip Select (S) can be used to ensure safe and proper
Power-up and Power-down.
To avoid data corruption and inadvertent write operations during Power-up, a Power On
Reset (POR) circuit is included. The logic inside the device is held reset while V_CC is less
than the Power On Reset (POR) threshold voltage, V_WI – all operations are disabled, and
the device does not respond to any instruction.
Moreover, the device ignores all Write Enable (WREN), Page Program (PP), Sector Erase
(SE), Bulk Erase (BE) and Write Status Register (WRSR) instructions until a time delay of
t_PUW has elapsed after the moment that V_CC rises above the V_WI threshold. However, the
correct operation of the device is not guaranteed if, by this time, V_CC is still below V_CC(min).
No Write Status Register, Program or Erase instructions should be sent until the later of:
„ t_PUW after V_CC passed the V_WI threshold
„ t_VSL after V_CC passed the V_CC(min) level
These values are specified in Table 8.
If the delay, t_VSL, has elapsed, after V_CC has risen above V_CC(min), the device can be
selected for READ instructions even if the t_PUW delay is not yet fully elapsed.
At Power-up, the device is in the following state:
„ The device is in the Standby Power mode
„ The Write Enable Latch (WEL) bit is reset.
Normal precautions must be taken for supply rail decoupling, to stabilize the V_CC supply.
Each device in a system should have the V_CC rail decoupled by a suitable capacitor close to
the package pins (generally, this capacitor is of the order of 0.1µF).
At Power-down, when V_CC drops from the operating voltage, to below the Power On Reset
(POR) threshold voltage, V_WI, all operations are disabled and the device does not respond
to any instruction. (The designer needs to be aware that if a Power-down occurs while a
Write, Program or Erase cycle is in progress, some data corruption can result.)
Power up sequencing for Fast program/erase mode: V_CC should attain V_CCMIN before V_PPH
is applied.
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