PC28F00AP30TFA Datasheet, PDF (21/86 Pages) Micron Technology – Numonyx® Axcell™ P30-65nm Flash Memory 512-Mbit, 1-Gbit , 2-Gbit

P30-65nm
Table 7: Command Bus Cycles
Mode
Command
Bus
Cycles
First Bus Cycle
Oper
Addr⁽¹⁾ Data⁽²⁾
Second Bus Cycle
Oper
Addr⁽¹⁾
Data⁽²⁾
Read Array
1
Read Device Identifier
≥2
Read
Read CFI
≥2
Read Status Register
2
Clear Status Register
1
Word Program
2
Buffered Program⁽³⁾
>2
Program
Buffered Enhanced
Factory Program
>2
(BEFP)⁽⁴⁾
Write
Write
Write
Write
Write
Write
Write
Write
DnA
DnA
DnA
DnA
DnA
WA
WA
WA
0xFF
0x90
0x98
0x70
0x50
0x40
0xE8
0x80
-
Read
Read
Read
-
Write
Write
-
DBA + IA
DBA + CFI-A
DnA
-
WA
WA
-
ID
CFI-D
SRD
-
WD
N-1
Write
WA
0xD0
Erase
Block Erase
2
Write
BA
0x20
Write
BA
0xD0
Program/Erase
Suspend
1
Suspend
Program/Erase
Resume
1
Block Lock
2
Block Unlock
2
Protection Block Lock-down
2
Program OTP Register
2
Program Lock Register
2
Configuration
Configure Read
Configuration Register
2
Write
Write
Write
Write
Write
Write
Write
Write
DnA
DnA
BA
BA
BA
OTP-RA
LRA
RCD
0xB0
0xD0
0x60
0x60
0x60
0xC0
0xC0
0x60
-
-
Write
Write
Write
Write
Write
Write
-
-
BA
BA
BA
OTP-RA
LRA
RCD
-
-
0x01
0xD0
0x2F
OTP-D
LRD
0x03
Blank Check Block Blank Check
2
Write
BA
0xBC
Write
BA
D0
EFI
Extended Function
Interface⁽⁵⁾
>2
Write
WA
0xEB
Write
WA
Sub-Op
code
Notes:
1.
First command cycle address should be the same as the operation’s target address.
DBA = Device Base Address.
DnA = Address within the device.
IA = Identification code address offset.
CFI-A = Read CFI address offset.
WA = Word address of memory location to be written.
BA = Address within the block.
OTP-RA = OTP Register address.
LRA = Lock Register address.
RCD = Read Configuration Register data on A[16:1].
2.
ID = Identifier data.
CFI-D = CFI data on DQ[15:0].
SRD = Status Register data.
WD = Word data.
N = Word count of data to be loaded into the write buffer.
OTP-D = OTP Register data.
LRD = Lock Register data.
3.
The second cycle of the Buffered Program Command is the word count of the data to be loaded into the write buffer. This
is followed by up to 512 words of data. Then the confirm command (0xD0) is issued, triggering the array programming
operation.
4.
The confirm command (0xD0) is followed by the buffer data.
5.
The second cycle is a Sub-Op-Code, the data written on third cycle is N-1; 1 ≤ N ≤ 512. The subsequent cycles load data
words into the program buffer at a specified address until word count is achieved. After the data words are loaded, the
final cycle is the confirm cycle 0xD0).
Datasheet
21
Sept 2012
Order Number: 208042-06