English
Language : 

MT40A1G16HBA-083E Datasheet, PDF (13/19 Pages) Micron Technology – TwinDie 1.2V DDR4 SDRAM
16Gb: x16 TwinDie Single Rank DDR4 SDRAM
Current Specifications – Limits
When TC > 85°C: IDD0, IDD1, IDD2N, IDD2NT, IDD2Q, IDD3N, IDD3P, IDD4R, IDD4W, and IDD5B must
be derated by 3%; IDD2P must be derated by 40%.
5. When additive latency is enabled for IDD1, current changes by approximately +4%.
6. When additive latency is enabled for IDD2N, current changes by approximately +0%.
7. When DLL is disabled for IDD2N, current changes by approximately –23%.
8. When CAL is enabled for IDD2N, current changes by approximately –25%.
9. When gear-down is enabled for IDD2N, current changes by approximately 0%.
10. When CA parity is enabled for IDD2N, current changes by approximately +7%.
11. IPP3N test and limit is applicable for all IDD2x, IDD3x, IDD4x, IDD6x, and IDD8 conditions; that
is, testing IPP3N should satisfy the IPPs for the noted IDD tests.
12. When additive latency is enabled for IDD3N, current changes by approximately +0.6%.
13. When additive latency is enabled for IDD4R, current changes by approximately +5%.
14. When read DBI is enabled for IDD4R, current changes by approximately 0%.
15. When additive latency is enabled for IDD4W, current changes by approximately +4%.
16. When write DBI is enabled for IDD4W, current changes by approximately 0%.
17. When write CRC is enabled for IDD4W, current changes by approximately –3%.
18. When CA parity is enabled for IDD4W, current changes by approximately +12%.
19. When 2X REF is enabled for IDD5B, current changes by approximately –14%.
20. When 4X REF is enabled for IDD5B, current changes by approximately –33%.
21. Applicable for MR2 settings A7 = 0 and A6 = 0; manual mode with normal temperature
range of operation (0–85°C).
22. Applicable for MR2 settings A7 = 1 and A7 = 0; manual mode with extended tempera-
ture range of operation (0–95°C).
23. Applicable for MR2 settings A7 = 0 and A7 = 1; manual mode with reduced temperature
range of operation (0–45°C).
24. IDD6R and IDD6A values are typical.
Table 9: x16 IDD, IPP, and IDDQ Current Limits – Rev. B, D
Symbol
DDR4-21331 DDR4-2400
IDD0: One bank ACTIVATE-to-PRECHARGE
90
96
current
IPP0: One bank ACTIVATE-to-PRECHARGE IPP
6
6
current
IDD1: One bank ACTIVATE-to-READ-to-PRE-
114
120
CHARGE current
IDD2N: Precharge standby current
66
68
DDR4-2666
102
6
126
70
DDR4-2933
108
6
132
72
IDD2NT: Precharge standby ODT current
IDD2P: Precharge power-down current
IDD2Q: Precharge quiet standby current
IDD3N: Active standby current
IPP3N: Active standby IPP current
IDD3P: Active power-down current
IDD4R: Burst read current
90
100
100
110
50
50
50
50
60
60
60
60
80
86
92
98
6
6
6
6
78
82
86
90
250
270
292
314
Unit
mA
Notes
2, 3, 4
mA
mA
3, 4, 5
mA 4, 6, 7, 8,
9, 10, 11
mA
4, 11
mA
4, 11
mA
4, 11
mA
4, 11
mA
mA
4, 11
mA 4, 14, 13,
11
09005aef86573aa8
DDR4_16Gb_x16_1CS_TwinDie.pdf - Rev. E 12/16 EN
13
Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 2015 Micron Technology, Inc. All rights reserved.