MT2LDT432H Datasheet, PDF (10/25 Pages) Micron Technology – SMALL-OUTLINE DRAM MODULE

ADVANCE
4, 8 MEG x 32
DRAM SODIMMs
EDO PAGE MODE
AC ELECTRICAL CHARACTERISTICS
(Notes: 5, 6, 7, 8, 9, 10, 11, 12, 19) (VDD = +3.3V ±0.3V)
AC CHARACTERISTICS - EDO PAGE MODE OPTION
PARAMETER
Access time from column address
Column-address setup to CAS# precharge
Column-address hold time (referenced to RAS#)
Column-address setup time
Row-address setup time
Access time from CAS#
Column-address hold time
CAS# pulse width
CAS# LOW to “Don’t Care” during Self Refresh
CAS# hold time (CBR Refresh)
CAS# to output in Low-Z
Data output hold after next CAS# LOW
CAS# precharge time
Access time from CAS# precharge
CAS# to RAS# precharge time
CAS# hold time
CAS# setup time (CBR Refresh)
WRITE command to CAS# lead time
Data-in hold time
Data-in setup time
Output buffer turn-off delay
EDO-PAGE-MODE READ or WRITE cycle time
Access time from RAS#
RAS# to column-address delay time
Row-address hold time
RAS# pulse width
RAS# pulse width (EDO PAGE MODE)
RAS# pulse width during Self Refresh
Random READ or WRITE cycle time
RAS# to CAS# delay time
SYMBOL
t_AA
t_ACH
t_AR
t_ASC
t_ASR
t_CAC
t_CAH
t_CAS
t_CHD
t_CHR
t_CLZ
t_COH
t_CP
t_CPA
t_CRP
t_CSH
t_CSR
t_CWL
t_DH
t_DS
t_OFF
t_PC
t_RAC
t_RAD
t_RAH
t_RAS
t_RASP
t_RASS
t_RC
t_RCD
MIN
12
38
0
0
8
8
15
8
0
3
8
5
38
5
8
8
0
0
20
9
9
50
50
100
84
11
-5
MAX
25
13
10,000
28
12
50
10,000
125,000
MIN
15
45
0
0
10
10
15
10
0
3
10
5
45
5
10
10
0
0
25
12
10
60
60
100
104
14
-6
MAX
30
15
10,000
35
15
60
10,000
125,000
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
ns
ns
NOTES
25
4
13
4
18
18
17, 23
15
25
14
4, 8 Meg x 32 DRAM SODIMMs
DM89.p65 – Rev. 12/98
10
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©1998, Micron Technology, Inc.