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MT9VDDT1672A Datasheet, PDF (1/29 Pages) Micron Technology – DDR SDRAM DIMM
DDR SDRAM
DIMM
Features
• JEDEC-standard 184-pin dual in-line memory
module (DIMM)
• Fast data transfer rates PC1600, PC2100, or PC2700
• Utilizes 200 MT/s, 266 MT/s, and 333MT/s DDR
SDRAM components
• ECC-optimized pinout 128MB (16 Meg x 72), 256MB
(32 Meg x 72)
• VDD= VDDQ= +2.5V
• VDDSPD = +2.3V to +3.6V
• +2.5V I/O (SSTL_2 compatible)
• Commands entered on each positive CK edge
• DQS edge-aligned with data for READs; center-
aligned with data for WRITEs
• Internal, pipelined double data rate (DDR)
architecture; two data accesses per clock cycle
• Bidirectional data strobe (DQS) transmitted/
received with data—i.e., source-synchronous data
capture
• Differential clock inputs (CK and CK#)
• Four internal device banks for concurrent operation
• Programmable burst lengths: 2, 4, or 8
• Auto precharge option
• Auto Refresh and Self Refresh Modes
• 15.6µs (128MB), 7.8125µs (256MB) maximum
average periodic refresh interval
• Serial Presence-Detect (SPD) with EEPROM
• Programmable READ CAS latency
128MB, 256MB (x72, ECC)
184-Pin DDR SDRAM DIMM
MT9VDDT1672A - 128MB
MT9VDDT3272A - 256MB
For the latest data sheet, please refer to the Micronâ Web
site: www.micron.com/moduleds
Figure 1: 184-Pin DIMM (MO-206)
OPTIONS
• Package
Unbuffered
184-pin DIMM (Gold)
184-pin DIMM (Lead-Free)
• Frequency/CAS Latency
6ns, 333 MT/s (167 MHz), CL = 2.5
7.5ns, 266 MT/s (133 MHz ), CL = 2
7.5ns, 266 MT/s (133 MHz ), CL = 2
7.5ns, 266 MT/s (133 MHz ), CL = 2.5
10ns, 200 MT/s (100 MHz ), CL = 2
• Self Refresh
Standard
Low Power
MARKING
A
G
Y
-335
-262
-26A
-265
-202
None
L
Table 1: Address Table
128MB
Refresh Count
Row Addressing
Device Bank Addressing
Device Configuration
Column Addressing
Module Rank Addressing
4K
4K (A0–A11)
4 (BA0, BA1)
16 Meg x 8
1K (A0–A9)
1 (S0#)
256MB
8K
8K (A0–A12)
4 (BA0, BA1)
32 Meg x 8
1K (A0–A9)
1 (S0#)
09005aef808f8ccd
DD9C16_32X72AG_B.fm - Rev. B 2/03 EN
1
©2003 Micron Technology, Inc.
PRODUCTS AND SPECIFICATIONS DISCUSSED HEREIN ARE SUBJECT TO CHANGE BY MICRON WITHOUT NOTICE.