MT9VDDF3272G Datasheet, PDF (1/34 Pages) Micron Technology – DDR SDRAM REGISTERED DIMM

DDR SDRAM
REGISTERED DIMM
256MB, 512MB (x72, ECC, SR)
184-PIN DDR SDRAM RDIMM
MT9VDDF3272 – 256MB
MT9VDDF6472 – 512MB
For the latest data sheet, please refer to the Micron^ Web
site: www.micron.com/products/modules
Features
• 184-pin, dual, in-line memory module (DIMM)
• Fast data transfer rates: PC1600, PC2100, or PC2700
• Utilizes 200 MT/s, 266 MT/s, and 333 MT/s DDR
SDRAM components
• Registered Inputs with one-clock delay
• Phase-lock loop (PLL) clock driver to reduce loading
• Supports ECC error detection and correction
• 256MB (32 Meg x 72); and 512MB (64 Meg x 72)
• VDD = VDDQ = +2.5V
• VDDSPD = +2.3V to +3.6V
• 2.5V I/O (SSTL_2 compatible)
• Commands entered on each positive CK edge
• DQS edge-aligned with data for READs; center-
aligned with data for WRITEs
• Internal, pipelined double data rate (DDR)
architecture; two data accesses per clock cycle
• Bidirectional data strobe (DQS) transmitted/received
with data—i.e., source-synchronous data capture
• Differential clock inputs CK and CK#
• Four internal device banks for concurrent operation
• Programmable burst lengths: 2, 4, or 8
• Auto precharge option
• Auto Refresh and Self Refresh Modes
• 7.8125µs maximum average periodic refresh
interval
• Serial Presence-Detect (SPD) with EEPROM
• Programmable READ CAS latency
• Gold edge contacts
OPTIONS
• Operating Temperature Range
Commercial (0°C ≤ T_A ≤ +70°C)
Industrial (-40°C ≤ T_A ≤ +85°C)
MARKING
none
I¹
Table 1: Address Table
Refresh Count
Row Addressing
Device Bank Addressing
Device Configuration
Column Addressing
Module Rank Addressing
Figure 1: 184-Pin DIMM (MO-206)
Low-Profile 1.125in. (28.58mm) 256MB
Low-Profile 1.125in. (28.58mm) 512MB
Very Low-Profile 0.72in. (18.29mm)
OPTIONS
• Package
184-pin DIMM (standard)
184-pin DIMM (lead-free)¹
• Memory Clock, Speed, CAS Latency²
6ns (167 MHz), 333 MT/s, CL = 2.5
7.5ns (133 MHz), 266 MT/s, CL = 2
7.5ns (133 MHz), 266 MT/s, CL = 2
7.5ns (133 MHz), 266 MT/s, CL = 2.5
10ns (100 MHz), 200 MT/s, CL = 2
• PCB
Low-Profile 1.125in. (28.58mm)
Very Low-Profile 0.72in. (18.29mm)
MARKING
G
Y
-335
-262¹
-26A¹
-265
-202
NOTE: 1. Contact Micron for product availability.
2. CL = CAS (READ) Latency; Registered mode will
add one clock cycle to CL.
256MB
8K
8K (A0–A12)
4 (BA0, BA1)
256Mb (32 Meg x 8)
1K (A0–A9)
1 (S0#)
512MB
8K
8K (A0–A12)
4 (BA0, BA1)
512Mb (64 Meg x 8)
2K (A0–A9, A11)
1 (S0#)
pdf: 09005aef80e119b2, source: 09005aef807d56a1
DDF9C32_64x72G.fm - Rev. B 9/04 EN
1
©2004 Micron Technology, Inc. All rights reserved.
PRODUCTS AND SPECIFICATIONS DISCUSSED HEREIN ARE SUBJECT TO CHANGE BY MICRON WITHOUT NOTICE.