MT9LSDT1672AY Datasheet, PDF (1/26 Pages) Micron Technology – SYNCHRONOUS DRAM MODULE

128MB (x72, ECC, SR), 256MB (x72, ECC, DR)
168-PIN SDRAM UDIMM
SYNCHRONOUS
DRAM MODULE
MT9LSDT1672A(I) – 128MB
MT18LSDT3272A(I) – 256MB
For the latest data sheet, please refer to the Micron^ Web
site: www.micron.com/products/modules
Features
• PC100- and PC133-compliant
• 168-pin, dual in-line memory module (DIMM)
• Unbuffered, ECC-optimized pinout
• 128MB (16 Meg x 72) and 256MB (32 Meg x 72)
• Single +3.3V power supply
• Fully synchronous; all signals registered on positive
edge of system clock
• Internal pipelined operation; column address can
be changed every clock cycle
• Internal SDRAM banks for hiding row access/precharge
• Programmable burst lengths: 1, 2, 4, 8, or full page
• Auto Precharge, includes Concurrent Auto
Precharge, and Auto Refresh Modes
• Self Refresh Mode
• 64ms, 4,096-cycle refresh
• LVTTL-compatible inputs and outputs
• Serial Presence-Detect (SPD)
• Gold edge contacts
Table 1: Timing Parameters
MODULE
MARKING
-13E
-133
-10E
ACCESS TIME
CLOCK
FREQUENCY CL = 2 CL = 3
133 MHz
133 MHz
100 MHz
5.4ns
–
9ns
–
5.4ns
7.5ns
SETUP
TIME
1.5
1.5
2ns
HOLD
TIME
0.8
0.8
1ns
Figure 1: 168-Pin DIMM (MO–161)
Standard 1.375in./34.93mm
Low Profile 1.125in./28.58mm
Options
Marking
• Self-Refresh
Standard
Low Power
None
L¹
• Package
168-pin DIMM (Standard)
G
168-pin DIMM (Lead-free)
Y¹
• Frequency/CAS Latency
7.5ns (133 MHz)/CL = 2
-13E
7.5ns (133 MHz)/CL = 3
-133
10ns (100 MHz)/CL = 2
-10E
• PCB
Standard (1.375in./34.93mm) See note on page 2
Low-Profile (1.125in./28.58mm) See note on page 2
NOTE: 1. Consult Micron for product availability.
Table 2: Address Table
Refresh Count
Device Banks
Device Configuration
Row Addressing
Column Addressing
Module Ranks
128MB
4K
4 (BA0, BA1)
128Mb (16 Meg x 8)
4K (A0–A11)
1K (A0–A9)
1 (S0, S2)
256MB
4K
4 (BA0, BA1)
128Mb (16 Meg x 8)
4K (A0–A11)
1K (A0–A9)
2 (S0, S2; S1, S3)
09005aef807b3709
SD9_18C16_32x72AG.fm - Rev. E 6/04 EN
1
©2004 Micron Technology, Inc.
PRODUCTS AND SPECIFICATIONS DISCUSSED HEREIN ARE SUBJECT TO CHANGE BY MICRON WITHOUT NOTICE.