MT28F322D20 Datasheet, PDF (1/44 Pages) Micron Technology – FLASH MEMORY

FLASH MEMORY
2 MEG x 16
ASYNC/PAGE/BURST FLASH MEMORY
MT28F322D20
MT28F322D18
Low Voltage, Extended Temperature
0.18µm Process Technology
FEATURES
• Flexible dual-bank architecture
– Support for true concurrent operation with zero
latency
– Read bank a during program bank b and vice versa
– Read bank a during erase bank b and vice versa
• Basic configuration:
Seventy-one erasable blocks
– Bank a (8Mb for data storage)
– Bank b (24Mb for program storage)
• VCC, VCCQ, VPP voltages
– 1.70V (MIN), 1.90V (MAX) VCC, VCCQ
(MT28F322D18 only)
– 1.80V VCC, VCCQ (MIN); 2.20V VCC (MAX)and 2.25V
VCCQ (MAX) (MT28F322D20 only)
– 0.9V (TYP) VPP (in-system PROGRAM/ERASE)
– 12V ±5% (HV) VPP tolerant (factory programming
compatibility)
• Random access time: 70ns/80ns @ 1.70V VCC
• Burst Mode read access (MT28F322D20)
– MAX clock rate: 54 MHz (^tCLK = 18.5ns)
– Burst latency: 70ns @ 1.80V VCC and 54 MHz
– ^tACLK: 17ns @ 1.80V VCC and 54 MHz
• Page Mode read access¹
– Eight-word page
– Interpage read access: 70ns/80ns @ 1.80V
– Intrapage read access: 30ns @ 1.80V
• Low power consumption (VCC = 2.20V)
– Asynchronous READ < 15mA (MAX)
– Standby < 50µA
– Automatic power saving feature (APS)
• Enhanced write and erase suspend options
– ERASE-SUSPEND-to-READ within same bank
– PROGRAM-SUSPEND-to-READ within same bank
– ERASE-SUSPEND-to-PROGRAM within same bank
• Dual 64-bit chip protection registers for security
purposes
• Cross-compatible command support
– Extended command set
– Common flash interface
• PROGRAM/ERASE cycle
– 100,000 WRITE/ERASE cycles per block
NOTE: 1. Data based on MT28F322D20 device.
2. A “5” in the part mark represents two different
frequencies: 54 MHz (MT28F322D20) or 52 MHz
(MT28F322D18)
BALL ASSIGNMENT
58-Ball FBGA
1
2
3
4
5
6
7
8
A
A11
A8
VSS
VCC
VPP
A18
A6
A4
B
A12
A9
A20 CLK RST# A17
A5
A3
C
A13 A10
ADV# WE# A19
A7
A2
D
A15 A14 WAIT# A16 DQ12 WP#
A1
E
VCCQ DQ15 DQ6 DQ4 DQ2 DQ1 CE#
A0
F
VSS DQ14 DQ13 DQ11 DQ10 DQ9 DQ0 OE#
G
DQ7 VSSQ DQ5
VCC
DQ3 VCCQ DQ8 VSSQ
Top View
(Ball Down)
NOTE: See page 7 for Ball Description Table.
See page 43 for mechanical drawing.
OPTIONS
• Timing
70ns access
80ns access
• Frequency
54 MHz
40 MHz
No burst operation
• Boot Block Configuration
Top
Bottom
• Package
58-ball FBGA (8 x 7 ball grid)
• Operating Temperature Range
Extended (-40ºC to +85ºC)
MARKING
-70
-80
5²
4
None
T
B
FH
ET
Part Number Example:
MT28F322D20FH-804 BET
2 Meg x 16 Async/Page/Burst Flash Memory
MT28F322D20FH_4.p65 – Rev. 4, Pub. 7/02
1
©2002, Micron Technology, Inc.
PRODUCTS AND SPECIFICATIONS DISCUSSED HEREIN ARE SUBJECT TO CHANGE BY MICRON WITHOUT NOTICE.