MT28F002B5 Datasheet, PDF (1/31 Pages) Micron Technology – FLASH MEMORY

FLASH MEMORY
2Mb
SMART 5 BOOT BLOCK FLASH MEMORY
MT28F002B5
MT28F200B5
5V Only, Dual Supply (Smart 5)
FEATURES
• Five erase blocks:
16KB/8K-word boot block (protected)
Two 8KB/4K-word parameter blocks
Two main memory blocks
• Smart 5 technology (B5):
5V ±10% VCC
5V ±10% VPP application/production
programming
12V ±5% VPP compatibility production
programming
• Address access times: 60ns, 80ns
• 100,000 ERASE cycles
• Industry-standard pinouts
• Inputs and outputs are fully TTL-compatible
• Automated write and erase algorithm
• Two-cycle WRITE/ERASE sequence
• Byte- or word-wide READ and WRITE
(MT28F200B5, 128K x 16/256K x 8)
• Byte-wide READ and WRITE only
(MT28F002B5, 256K x 8)
• TSOP and SOP packaging options
OPTIONS
• Timing
60ns access
80ns access
80ns access
• Configurations
256K x 8
128K x 16/256K x 8
• Boot Block Starting Word Address
Top (1FFFFH)
Bottom (00000H)
• Operating Temperature Range
Commercial (0°C to +70°C)
Extended (-40°C to +85°C)
• Packages
Plastic 44-pin SOP (600 mil)
Plastic 48-pin TSOP Type 1
(12mm x 20mm)
Plastic 40-pin TSOP
(10mm x 20mm)
MARKING
-6
-8
-8 ET
MT28F002B5
MT28F200B5
T
B
None
ET
SG
WG
VG
Part Number Example:
MT28F200B5SG-8 T
40-Pin TSOP Type I 48-Pin TSOP Type I
44-Pin SOP
GENERAL DESCRIPTION
The MT28F002B5 (x8) and MT28F200B5 (x16/x8)
are nonvolatile, electrically block-erasable (flash), pro-
grammable, read-only memories containing 2,097,152
bits organized as 262,144 bytes (8 bits) or 131,072
words (16 bits). Writing or erasing the device is done
with a 5V VPP voltage, while all operations are per-
formed with a 5V VCC. Due to process technology
advances, 5V VPP is optimal for application and produc-
tion programming. For backward compatibility with
SmartVoltage technology, 12V VPP is supported for a
maximum of 100 cycles and may be connected for up
to 100 cumulative hours. These devices are fabricated
with Micron’s advanced CMOS floating-gate process.
The MT28F002B5 and MT28F200B5 are organized
into five separately erasable blocks. To ensure that
critical firmware is protected from accidental erasure or
overwrite, the devices feature a hardware-protected
boot block. Writing or erasing the boot block requires
either applying a super-voltage to the RP# pin or driv-
ing WP# HIGH in addition to executing the normal
write or erase sequences. This block may be used to store
code implemented in low-level system recovery. The
remaining blocks vary in density and are written and
erased with no additional security measures.
Please refer to Micron’s Web site (www.micron.com/
flash/htmls/datasheets.html) for the latest data sheet.
2Mb Smart 5 Boot Block Flash Memory
F50.p65 – Rev. 1/00
1
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2000, Micron Technology, Inc.