MT28C6428P20 Datasheet, PDF (1/48 Pages) Micron Technology – FLASH AND SRAM COMBO MEMORY

ADVANCE^‡
4 MEG x 16 ASYNCHRONOUS/PAGE FLASH
512K x 16 SRAM COMBO MEMORY
FLASH AND SRAM
COMBO MEMORY
MT28C6428P20
MT28C6428P18
Low Voltage, Extended Temperature
0.18µm Process Technology
FEATURES
• Flexible dual-bank architecture
• Support for true concurrent operations with no
latency:
Read bank b during program bank a and vice versa
Read bank b during erase bank a and vice versa
• Organization: 4,096K x 16 (Flash)
512K x 16 (SRAM)
• Basic configuration:
Flash
Bank a (16Mb Flash for data storage)
– Eight 4K-word parameter blocks
– Thirty-one 32K-word blocks
Bank b (48Mb Flash for program storage)
– Ninety-six 32K-word main blocks
SRAM
8Mb SRAM for data storage
– 512K-words
• F_VCC, VCCQ, F_VPP, S_VCC voltages
MT28C6428P20
1.80V (MIN)/2.20V (MAX) F_VCC read voltage
1.80V (MIN)/2.20V (MAX) S_VCC read voltage
1.80V (MIN)/2.20V (MAX) VCCQ
MT28C6428P18
1.70V (MIN)/1.90V (MAX) F_VCC read voltage
1.70V (MIN)/1.90V (MAX) S_VCC read voltage
1.70V (MIN)/1.90V (MAX) VCCQ
MT28C6428P20/P18
1.80V (TYP) F_VPP (in-system PROGRAM/ERASE)
1.0V (MIN) S_VCC (SRAM data retention)
12V ±5% (HV) F_VPP (in-house programming and
accelerated programming algorithm [APA]
activation)
• Asynchronous access time
Flash access time: 80ns @ 1.80V F_VCC
SRAM access time: 80ns @ 1.80V S_VCC
• Page Mode read access
Interpage read access: 80ns @ 1.80V F_VCC
Intrapage read access: 30ns @ 1.80V F_VCC
• Low power consumption
• Enhanced suspend options
ERASE-SUSPEND-to-READ within same bank
PROGRAM-SUSPEND-to-READ within same bank
ERASE-SUSPEND-to-PROGRAM within same bank
• Read/Write SRAM during program/erase of Flash
BALL ASSIGNMENT
67-Ball FBGA (Top View)
1
2
3
4
5
6
7
8
9 10 11 12
A NC
NC
A20 A11 A15 A14 A13 A12 F_VSS VccQ NC
NC
B
A16
A8
A10
A9 DQ15 S_WE# DQ14 DQ7
C
F_WE# NC
A21
DQ13 DQ6 DQ4 DQ5
D
VSS F_RP#
DQ12 S_CE2 S_VCC F_VCC
E
F_WP# F_VPP A19 DQ11
DQ10 DQ2 DQ3
F
S_LB# S_UB# S_OE#
DQ9 DQ8 DQ0 DQ1
G
A18 A17
A7
A6
A3
A2
A1 S_CE1#
H NC
NC F_VCC A5
A4
A0 F_CE# F_VSS F_OE# NC
NC
NC
Top View
(Ball Down)
• Dual 64-bit chip protection registers for security
purposes
• PROGRAM/ERASE cycles
100,000 WRITE/ERASE cycles per block
• Cross-compatible command set support
Extended command set
Common flash interface (CFI) compliant
OPTIONS
• Timing
80ns
85ns
• Boot Block Configuration
Top
Bottom
• Operating Voltage Range
F_VCC = 1.70V–1.90V
F_VCC = 1.80V–2.20V
• Operating Temperature Range
Commercial (0^oC to +70^oC)
Extended (-40^oC to +85^oC)
• Package
67-ball FBGA (8 x 8 grid)
MARKING
-80
-85
T
B
18
20
None
ET
FM
Part Number Example:
MT28C6428P20FM-80 BET
4 Meg x 16 Asynchronous/Page Flash 512K x 16 SRAM Combo Memory
MT28C6428P20_3.p65 – Rev. 3, Pub. 7/02
1
©2002, Micron Technology, Inc.
‡_{PRODUCTS AND SPECIFICATIONS DISCUSSED HEREIN ARE FOR EVALUATION AND REFERENCE PURPOSES ONLY AND ARE}
SUBJECT TO CHANGE BY MICRON WITHOUT NOTICE. PRODUCTS ARE ONLY WARRANTED BY MICRON TO MEET MICRON’S
PRODUCTION DATA SHEET SPECIFICATIONS.