UCS81003 Datasheet, PDF (96/108 Pages) Microchip Technology – Automotive USB Port Power Controller with Charger Emulation

UCS81003
11.2.1 SYSTEM MANAGEMENT BUS
In SMBus mode, the UCS81003 communicates with a
host controller. The SMBus is a two-wire serial
communication protocol between a computer host and
its peripheral devices. A detailed timing diagram is
shown in Figure 11-1. Stretching of the SMCLK signal
is supported; however, the UCS81003 will not stretch
the clock signal.
T_LOW
T_HIGH
T_HD:STA
T _SU:STO
SMCLK
SMDATA
T_BUF
T _RISE
T_HD:STA
T_HD:DAT
T _FALL
T_SU:DAT
T _SU:STA
P
S
S - Start Condition
FIGURE 11-1:
SMBus Timing Diagram.
11.2.1.1 SMBus Start Bit
The SMBus Start bit is defined as a transition of the
SMBus data line from a logic ‘1’ state to a logic ‘0’ state
while the SMBus clock line is in a logic ‘1’ state.
11.2.1.2 SMBus Address and RD/WR Bit
The SMBus Address Byte consists of the 7-bit client
address followed by the RD/WR indicator bit. If this
RD/WR bit is a logic ‘0’, the SMBus host is writing data
to the client device. If this RD/WR bit is a logic ‘1’, the
SMBus host is reading data from the client device.
TABLE 11-2: SEL PIN DECODE
Resistor (±5%)
GND
10 k pull-down
12 k pull-down
15 k pull-down
18 k pull-down
22 k pull-down
27 k pull-down
33 k pull-down
47 k pull-down
56 k pull-down
68 k pull-down
82 k pull-down
100 k pull-down
120 k pull-down
150 k pull-down
V_DD (If a pull-up resistor is used,
its value must not exceed 100 k)
S
P - Stop Condition
P
The SMBus address is determined based on the resistor
connected on the SEL pin as shown in Table 11-2.
Note:
If it is necessary to connect the SEL pin to
V_DD via a resistor, the pull-up resistor may
be any value up to 100 k.
PWR_EN Polarity
Active Low
Active Low
Active Low
Active Low
Active Low
Active Low
Active Low
Active Low
Active High
Active High
Active High
Active High
Active High
Active High
Active High
Active High
SMBus Address
1010_111(r/w)
1010_110(r/w)
1010_101(r/w)
1010_100(r/w)
0110_000(r/w)
0110_001(r/w)
0110_010(r/w)
0110_011(r/w)
0110_011(r/w)
0110_010(r/w)
0110_001(r/w)
0110_000(r/w)
1010_100(r/w)
1010_101(r/w)
1010_110(r/w)
1010_111(r/w)
DS20005334A-page 96
 2014 Microchip Technology Inc.