TC1232_13 Datasheet, PDF (9/20 Pages) Microchip Technology – Microprocessor Monitor

4.3 Watchdog Timer
When the ST input is not stimulated for a preset time
period, the watchdog timer function forces RST and
RST signals to the active state. The preset time period
is determined by the TD inputs to be 150 ms with TD
connected to ground, 600 ms with TD floating or
1200 ms with TD connected to V_CC (typ.). The
watchdog timer starts timing-out from the set time
period as soon as RST and RST are inactive. If a high-
to-low transition occurs on the ST input pin prior to
time-out, the watchdog timer is reset and begins to
time-out again. If the watchdog timer is allowed to time-
out, the RST and RST signals are driven to the active
state for 250 ms, minimum (Figure 4-7).
The software routine that strobes ST is critical. The
code must be in a section of software that is executed
frequently enough so the time between toggles is less
than the watchdog time-out period. One common
technique controls the microprocessor I/O line from two
sections of the program. The software might set the I/O
line high while operating in the Foreground mode and
set it low while in the Background or Interrupt modes. If
both modes do not execute correctly, the watchdog
timer issues reset pulses.
t_TD is the maximum elapsed time between ST high-to-
low transitions (ST is activated by falling edges only),
which will keep the watchdog timer from forcing the
reset outputs active for a time of t_RST. t_TD is a function
of the voltage at the TD pin, as tabulated below:
TABLE 4-1: WATCHDOG TIMER
PERIODS
t_TD
Condition
Min
Typ
Max
TD pin = 0V
TD pin = Open
TD pin = VCC
62.5 ms
250 ms
500 ms
150 ms
600 ms
1200 ms
250 ms
1000 ms
2000 ms
Figure 4-7 shows a block diagram for using the
TC1232 with a PICmicro^® MCU and the Watchdog
input.
+5V
10 k
3-Terminal
Regulator
(example:
MCP1700)
+5V
V_CC
RST
0.1
µF
TC1232
ST
TD TOL GND
RESET
PICmicro^®
MCU
I/O
FIGURE 4-7:
Watchdog Timer.
TC1232
Figure 4-8 shows the expected reset output pin wave-
forms depending on the period of the ST pin falling
edge and the state of the TD input pin.
ST
t_ST
t_TD
RST (when t_TD  t_TD (min))
“H”
RST
(when t_TD(min)  t_TD  t_TD(max))
RST
(when t_TD  t_TD(max))
RST (when t_TD  t_TD(min))
“L”
RST
(when t_TD(min)  t_TD  t_TD(max))
RST
(when t_TD  t_TD(max))
FIGURE 4-8:
Strobe Input.
4.4 Supply Monitor Noise Sensitivity
The TC1232 is optimized for fast response to negative-
going changes in V_DD. Systems with an inordinate
amount of electrical noise on V_DD (such as systems
using relays) may require a 0.01 µF or 0.1 µF bypass
capacitor to reduce detection sensitivity. This capacitor
should be installed as close to the TC1232 as possible
to keep the capacitor lead length short.
 2002-2012 Microchip Technology Inc.
Preliminary
DS21370D-page 9