KSZ8775CLX Datasheet, PDF (9/132 Pages) Microchip Technology – Integrated 5–Port 10/100 Managed Ethernet Switch with Port 4 RMII and Port 5 RGMII/MII/RMII Interfaces

TABLE 2-1:
Num Pins
SIGNALS (CONTINUED)
Pin Name
Type
43
RXD4_0
Ipd/O
44
RXDV4/CRS-
DV4
45
NC
46
VDD12D
TXC5/REF-
47
CLKI5/
GTXC5
IPD/O
NC
P
I/O
48
RXC5/
GRXC5
I/O
49
RXD5_0
50
RXD5_1
51
GNDD
52
VDDIO
53
RXD5_2
IPD/O
IPD/O
GND
P
IPD/O
KSZ8775CLX
Port
4
4
5
5
5
5
5
5
Pin Description
RMII:
Port 4 SW4-RMII receive bit [0].
Strap Option: Clock or Normal Mode Select in
Port 4 RMII
PU = Clock mode in RMII, using 25MHz OSC
clock and provide 50 MHz RMII clock from pin
RXC4 (Default)
PD = Normal mode in RMII, the TXC4/REFCLKI4
pin on the Port 4 RMII will receive an external
50 MHz clock
Note: Port 4 also can use either an internal or
external clock in RMII mode based on this strap
pin or the setting of the Register 70 (0x46) bit [7].
An external pull-up/down resistor is requested for
the strap-in.
RMII:
CRSDV4 is for Port 4 RMII carrier sense/receive
data valid output.
No connect
1.2V core power
Port 5 Switch GMAC5 Clock Pin:
MII: 2.5/25 MHz clock, PHY mode is output, MAC
mode is input.
RMII: Input for receiving 50 MHz in normal mode.
RGMII: Input 125 MHz clock with falling and rising
edge to latch data for the data transfer.
Port 5 Switch GMAC5 Clock Pin:
MII: 2.5/25 MHz clock, PHY mode is output, MAC
mode is input.
RMII: Output 50 MHz reference clock for the
receiving/transmit in the clock mode.
RGMII: Output 125 MHz clock with falling and ris-
ing edge to latch data for the receiving.
RGMII/MII/RMII:
Port 5 switch receive bit [0]
RGMII/MII/RMII:
Port 5 switch receive bit [1]
Digital ground
3.3V, 2.5V, or 1.8V digital VDD for digital I/O cir-
cuitry.
RGMII/MII:
Port 5 switch receive bit [2]
RMII:
No connection.
 2015 Microchip Technology Inc.
DS00002129C-page 9