HCS361 Datasheet, PDF (9/24 Pages) Microchip Technology – KEELOQ CODE HOPPING ENCODER

HCS361
TABLE 3-7 FUNCTION CODES
S3
S2
S1
S0
IND = 0 IND = 1
Comments
1
0
0
0
1
2
0
0
1
0
3
0
0
1
1
4
0
1
0
0
5
0
1
0
1
6
0
1
1
0
7
0
1
1
1
8
1
0
0
0
9
1
0
0
1
10
1
0
1
0
11
1
0
1
1
12
1
1
0
0
13
1
1
0
1
14
1
1
1
0
15
1
1
1
1
Counter
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
B
A
B
A
B
A
B
A
B IR mode
A
B IR mode
A
B IR mode
A
B IR mode
If SEED = 1, transmit seed after delay.
If SEED = 1, transmit seed immediately.
3.5.12 VPWM: VARIABLE PULSE WIDTH
MODULATION
VPWM selects between VPWM modulation and PWM
modulation. If VPWM = 1, VPWM modulation is
selected as well as the following:
1. Enables the TXWAK bit to select the WAKEUP
transmission.
2. Extends the Guard Time.
If VPWM = 0, PWM modulation is selected.
3.5.13 OVR: OVERFLOW
The overflow bit is used to extend the number of possi-
ble synchronization values. The synchronization
counter is 16 bits in length, yielding 65,536 values
before the cycle repeats. Under typical use of
10 operations a day, this will provide nearly 18 years of
use before a repeated value will be used. Should the
system designer conclude that is not adequate, then
the overflow bit can be utilized to extend the number of
unique values. This can be done by programming OVR
to 1 at the time of production. The encoder will automat-
ically clear OVR the first time that the transmitted syn-
chronization value wraps from 0xFFFF to 0x0000.
Once cleared, OVR cannot be set again, thereby creat-
ing a permanent record of the counter overflow. This
prevents fast cycling of 64K counter. If the decoder sys-
tem is programmed to track the overflow bits, then the
effective number of unique synchronization values can
be extended to 128K. If programmed to zero, the sys-
tem will be compatible with the NTQ104/5/6 devices
(i.e., no overflow with discrimination bits set to zero).
© 1996 Microchip Technology Inc.
Preliminary
DS40146C-page 9