PIC16C62B_13 Datasheet, PDF (84/122 Pages) Microchip Technology – 28-Pin 8-Bit CMOS Microcontrollers

PIC16C62B/72A
13.1 DC Characteristics: PIC16C62B/72A-04 (Commercial, Industrial, Extended)
PIC16C62B/72A-20 (Commercial, Industrial, Extended)
DC CHARACTERISTICS
Standard Operating Conditions (unless otherwise stated)
Operating temperature 0°C  TA  +70°C for commercial
-40°C  TA  +85°C for industrial
-40°C  TA +125°C for extended
Param Sym
No.
Characteristic
Min Typ† Max Units
Conditions
D001 VDD Supply Voltage
D001A
4.0 - 5.5 V XT, RC and LP osc mode
4.5 - 5.5 V HS osc mode
VBOR* - 5.5 V BOR enabled (Note 7)
D002* VDR RAM Data Retention
Voltage (Note 1)
-
1.5 -
V
D003 VPOR VDD Start Voltage to
-
ensure internal
Power-on Reset signal
VSS -
V See section on Power-on Reset for details
D004* SVDD VDD Rise Rate to
0.05 -
D004A*
ensure internal
TBD -
Power-on Reset signal
- V/ms PWRT enabled (PWRTE bit clear)
-
PWRT disabled (PWRTE bit set)
See section on Power-on Reset for details
D005
VBOR Brown-out Reset
voltage trip point
3.65 - 4.35 V BODEN bit set
D010 IDD Supply Current
(Note 2, 5)
- 2.7 5 mA XT, RC osc modes
FOSC = 4 MHz, VDD = 5.5V (Note 4)
D013
-
10 20 mA HS osc mode
FOSC = 20 MHz, VDD = 5.5V
D020 IPD Power-down Current - 10.5 42 A VDD = 4.0V, WDT enabled,-40C to +85C
(Note 3, 5)
- 1.5 16 A VDD = 4.0V, WDT disabled, 0C to +70C
D021
- 1.5 19 A VDD = 4.0V, WDT disabled,-40C to +85C
D021B
- 2.5 19 A VDD = 4.0V, WDT disabled,-40C to +125C
D022*
D022A*
IWDT
IBOR
Module Differential
Current (Note 6)
Watchdog Timer
Brown-out Reset
-
6.0 20 A WDTE BIT SET, VDD = 4.0V
- TBD 200 A BODEN bit set, VDD = 5.0V
* These parameters are characterized but not tested.
† Data in "Typ" column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only
and are not tested.
Note 1: This is the limit to which VDD can be lowered without losing RAM data.
2: The supply current is mainly a function of the operating voltage and frequency. Other factors such as I/O pin
loading and switching rate, oscillator type, internal code execution pattern, and temperature also have an
impact on the current consumption.
The test conditions for all IDD measurements in active operation mode are:
OSC1 = external square wave, from rail to rail; all I/O pins tristated, pulled to VDD,
MCLR = VDD; WDT enabled/disabled as specified.
3: The power-down current in SLEEP mode does not depend on the oscillator type. Power-down current is
measured with the part in SLEEP mode, with all I/O pins in hi-impedance state and tied to VDD and VSS.
4: For RC osc mode, current through Rext is not included. The current through the resistor can be estimated by
the formula Ir = VDD/2Rext (mA) with Rext in kOhm.
5: Timer1 oscillator (when enabled) adds approximately 20 A to the specification. This value is from charac-
terization and is for design guidance only. This is not tested.
6: The  current is the additional current consumed when this peripheral is enabled. This current should be
added to the base IDD or IPD measurement.
7: This is the voltage where the device enters the Brown-out Reset. When BOR is enabled, the device will
perform a brown-out reset when VDD falls below VBOR.
DS35008C-page 84
Preliminary
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