RE46C311 Datasheet, PDF (8/22 Pages) Microchip Technology – Low-Input Leakage, Rail-to-Rail Input/Output Op Amps

RE46C311/2
4.0 APPLICATIONS INFORMATION
The RE46C311/2 family of op amps is manufactured
using a state of the art CMOS process. These op amps
are unity gain stable and suitable for a wide range of
general purpose, low-power applications.
4.1 Rail-to-Rail Input
4.1.1 PHASE REVERSAL
The RE46C311/2 op amps are designed to not exhibit
phase inversion when the input pins exceed the supply
voltages. Figure 2-4 shows an input voltage exceeding
both supplies with no phase inversion.
4.1.2
INPUT VOLTAGE AND CURRENT
LIMITS
The ESD protection on the inputs can be depicted as
shown in Figure 4-1. This structure was chosen to
protect the input transistors and to minimize input bias
current (I_B). The input ESD diodes clamp the inputs
when they try to go more than one diode drop below
V_SS or one diode drop above V_DD.
V_DD
Bond
Pad
V_IN+
Bond
Pad
Input
Stage
Bond
Pad
V_IN–
V_SS
Bond
Pad
FIGURE 4-1:
Structures.
Simplified Analog Input ESD
In order to prevent damage and/or improper operation
of these amplifiers, the circuit must limit the currents
(and voltages) at the input pins (see Absolute
Maximum Ratings †).
A significant amount of current can flow out of the
inputs (through the ESD diodes) when the common
mode voltage (V_CM) is below V_SS or above V_DD.
Applications that are high-impedance may need to limit
the usable voltage range.
4.1.3 NORMAL OPERATION
The input stage of the RE46C311/2 op amps uses two
differential input stages in parallel. One operates at a
low common mode input voltage (V_CM), while the other
operates at a high V_CM. With this topology, the device
operates with a V_CM up to V_DD and down to V_SS. The
input offset voltage is measured at V_CM = V_SS and V_DD
to ensure proper operation.
There are two transitions in input behavior as V_CM is
changed. The first occurs when V_CM is near
V_SS + 0.4V, and the second occurs when V_CM is near
V_DD – 0.5V (see Figure 2-1 and Figure 2-2). For the
best distortion performance with non-inverting gains,
avoid these regions of operation.
4.2 Rail-to-Rail Output
There are two specifications that describe the output
swing capability of the RE46C311/2 family of op amps.
The first specification (Maximum Output Voltage
Swing) defines the absolute maximum swing that can
be achieved under the specified load condition. Thus,
the output voltage swings to within 10 mV of either
supply rail with a 50 k load to V_DD/2. Figure 2-4
shows how the output voltage is limited when the input
goes beyond the linear region of operation.
The second specification that describes the output
swing capability of these amplifiers is the Linear Output
Voltage Range. This specification defines the maxi-
mum output swing that can be achieved while the
amplifier still operates in its linear region. To verify
linear operation in this range, the large signal DC
Open-Loop Gain (A_OL) is measured at points inside the
supply rails. The measurement must meet the specified
A_OL condition in the specification table.
4.3 Output Loads and Battery Life
The RE46C311/2 op amp family has outstanding
quiescent current, which supports battery-powered
applications.
Heavy resistive loads at the output can cause
excessive battery drain. Driving a DC voltage of 2.5V
across a 100 k load resistor will cause the supply
current to increase by 25 µA, depleting the battery
43 times as fast as I_Q (0.6 µA, typical) alone.
High frequency signals (fast edge rate) across
capacitive loads will also significantly increase supply
current. For instance, a 0.1 µF capacitor at the output
presents an AC impedance of 15.9 k (1/2fC) to a
100 Hz sine wave. It can be shown that the average
power drawn from the battery by a 5.0 V_p-p sine wave
(1.77 V_rms), under these conditions, is:
EQUATION 4-1:
P_Supply = (V_DD - V_SS) (I_Q + V_L(p-p) f C_L )
= (5V)(0.6 µA + 5.0V_p-p · 100Hz · 0.1µF)
= 3.0 µW + 50 µW
This will drain the battery 17 times as fast as I_Q alone.
DS25163A-page 8
 2013 Microchip Technology Inc.