93AA76A_12 Datasheet, PDF (8/36 Pages) Microchip Technology – 8K Microwire Compatible Serial EEPROM

93AA76A/B/C, 93LC76A/B/C, 93C76A/B/C
2.8 Write
The WRITE instruction is followed by 8 bits (if ORG is
low or A-version devices) or 16 bits (if ORG pin is high
or B-version devices) of data which are written into the
specified address. The self-timed auto-erase and
programming cycle is initiated by the rising edge of CLK
on the last data bit.
FIGURE 2-6:
CS
WRITE TIMING
The DO pin indicates the Ready/Busy status of the
device, if CS is brought high after a minimum of 250 ns
low (TCSL). DO at logical ‘0’ indicates that programming
is still in progress. DO at logical ‘1’ indicates that the
register at the specified address has been written with
the data specified and the device is ready for another
instruction.
Note:
The write sequence requires a logic high
signal on the PE pin prior to the rising
edge of the last data bit.
Note:
After the Write cycle is complete, issuing a
Start bit and then taking CS low will clear
the Ready/Busy status from DO.
TCSL
CLK
DI
1 0 1 AN ••• A0 Dx ••• D0
TSV
TCZ
High-Z
DO
Busy
Ready
High-Z
TWC
DS21796M-page 8
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