24AA512 Datasheet, PDF (8/26 Pages) Microchip Technology – 512K I2C CMOS Serial EEPROM

24AA512/24LC512/24FC512
5.0 DEVICE ADDRESSING
A control byte is the first byte received following the
Start condition from the master device (Figure 5-1).
The control byte consists of a 4-bit control code; for the
24XX512 this is set as ‘1010’ binary for read and write
operations. The next three bits of the control byte are
the Chip Select bits (A2, A1 and A0). The Chip Select
bits allow the use of up to eight 24XX512 devices on
the same bus and are used to select which device is
accessed. The Chip Select bits in the control byte must
correspond to the logic levels on the corresponding A2,
A1 and A0 pins for the device to respond. These bits
are in effect the three Most Significant bits of the word
address.
The last bit of the control byte defines the operation to
be performed. When set to a one a read operation is
selected and when set to a zero a write operation is
selected. The next two bytes received define the
address of the first data byte (Figure 5-2). Because all
A15…A0 are used, there are no upper address bits that
are “don’t care”. The upper address bits are transferred
first, followed by the Less Significant bits.
Following the Start condition, the 24XX512 monitors
the SDA bus checking the device type identifier being
transmitted. Upon receiving a ‘1010’ code and appro-
priate device select bits, the slave device outputs an
Acknowledge signal on the SDA line. Depending on the
state of the R/W bit, the 24XX512 will select a read or
write operation.
FIGURE 5-1:
CONTROL BYTE FORMAT
Read/Write Bit
Control Code
Chip Select
Bits
S 1 0 1 0 A2 A1 A0 R/W ACK
Start Bit
Slave Address
Acknowledge Bit
5.1 Contiguous Addressing Across
Multiple Devices
The Chip Select bits A2, A1 and A0 can be used to
expand the contiguous address space for up to 4 Mbit
by adding up to eight 24XX512s on the same bus. In
this case, software can use A0 of the control byte as
address bit A16; A1, as address bit A17; and A2, as
address bit A18. It is not possible to sequentially read
across device boundaries.
FIGURE 5-2:
ADDRESS SEQUENCE BIT ASSIGNMENTS
CONTROL BYTE
ADDRESS HIGH BYTE
1
0
1
0
A
2
A
1
A
0
R/W
CONTROL
CODE
CHIP
SELECT
BITS
A A A AA A A A
15 14 13 12 11 10 9 8
ADDRESS LOW BYTE
A
7
•
•
•
•
•
•
A
0
DS21754E-page 8
 2004 Microchip Technology Inc.