PIC12F508_1 Datasheet, PDF (75/98 Pages) Microchip Technology – 8/14-Pin, 8-Bit Flash Microcontrollers

PIC12F508/509/16F505
TABLE 10-1: DC CHARACTERISTICS: PIC12F508/509/16F505 (Industrial, Extended)
DC CHARACTERISTICS
Standard Operating Conditions (unless otherwise specified)
Operating temperature -40°C ≤ TA ≤ +85°C (industrial)
-40°C ≤ TA ≤ +125°C (extended)
Operating voltage VDD range as described in DC specification
Param
No.
Sym
Characteristic
Min
Typ† Max Units
Conditions
VIL Input Low Voltage
I/O ports:
D030
with TTL buffer
Vss
—
0.8V
V For all 4.5 ≤ VDD ≤ 5.5V
D030A
Vss
— 0.15 VDD V Otherwise
D031
with Schmitt Trigger buffer
Vss
— 0.15 VDD V
D032
MCLR, T0CKI
Vss
— 0.15 VDD V
D033
OSC1 (in EXTRC)
Vss
— 0.15 VDD V (Note1)
D033
OSC1 (in HS)
Vss
— 0.3 VDD V (Note1)
D033
OSC1 (in XT and LP)
Vss
—
0.3
V (Note1)
VIH Input High Voltage
I/O ports:
—
D040
with TTL buffer
2.0
—
VDD
V 4.5 ≤ VDD ≤ 5.5V
D040A
0.25 VDD —
VDD
+ 0.8 VDD
V Otherwise
D041
with Schmitt Trigger buffer
0.85 VDD —
VDD
V For entire VDD range
D042
MCLR, T0CKI
0.85 VDD —
VDD
V
D043
OSC1 (in EXTRC)
0.85 VDD —
VDD
V (Note1)
D043
OSC1 (in HS)
0.7 VDD —
VDD
V (Note1)
D043
D070
IPUR
IIL
OSC1 (in XT and LP)
GPIO weak pull-up current⁽⁴⁾
Input Leakage Current^{(2), (3)}
1.6
—
VDD
TBD
250
TBD
V
µA VDD = 5V, VPIN = VSS
D060
D061
D061A
I/O ports
GP3/RB3/MCLRI⁽⁵⁾
GP3/RB3/MCLRI⁽⁶⁾
—
—
±1
µA Vss ≤ VPIN ≤ VDD, Pin at high-impedance
—
—
± 30
µA Vss ≤ VPIN ≤ VDD
—
—
±5
µA Vss ≤ VPIN ≤ VDD
D063
OSC1
—
—
±5
µA Vss ≤ VPIN ≤ VDD, XT, HS and LP oscillator
configuration
Output Low Voltage
D080
I/O ports/CLKOUT
—
—
0.6
V IOL = 8.5 mA, VDD = 4.5V, -40°C to +85°C
D080A
—
—
0.6
V IOL = 7.0 mA, VDD = 4.5V, -40°C to +125°C
D083
OSC2
—
—
0.6
V IOL = 1.6 mA, VDD = 4.5V, -40°C to +85°C
D083A
—
—
0.6
V IOL = 1.2 mA, VDD = 4.5V, -40°C to +125°C
D090
Output High Voltage
I/O ports/CLKOUT⁽³⁾
VDD – 0.7 —
—
V IOH = -3.0 mA, VDD = 4.5V, -40°C to +85°C
D090A
VDD – 0.7 —
—
V IOH = -2.5 mA, VDD = 4.5V, -40°C to +125°C
D092
OSC2
VDD – 0.7 —
—
V IOH = -1.3 mA, VDD = 4.5V, -40°C to +85°C
D092A
VDD – 0.7 —
—
V IOH = -1.0 mA, VDD = 4.5V, -40°C to +125°C
Capacitive Loading Specs on
Output Pins
D100
OSC2 pin
—
—
15
pF In XT, HS and LP modes when external clock is
used to drive OSC1.
D101
All I/O pins and OSC2
—
—
50
pF
Legend:
†
Note 1:
2:
3:
4:
5:
6:
TBD = To Be Determined.
Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested.
In EXTRC oscillator configuration, the OSC1/CLKIN pin is a Schmitt Trigger input. It is not recommended that the PIC12F508/509/
16F505 be driven with external clock in RC mode.
The leakage current on the MCLR pin is strongly dependent on the applied voltage level. The specified levels represent normal operating
conditions. Higher leakage current may be measured at different input voltages.
Negative current is defined as coming out of the pin.
Does not include GP3/RB3. For GP3/RB3 see parameters D061 and D061A.
This specification applies to GP3/RB3/MCLR configured as external MCLR and GP3/RB3/MCLR configured as input with internal pull-up
enabled.
This specification applies when GP3/RB3/MCLR is configured as an input with pull-up disabled. The leakage current of the MCLR circuit
is higher than the standard I/O logic.
 2004 Microchip Technology Inc.
Preliminary
DS41236A-page 73