RN52 Datasheet, PDF (7/26 Pages) Microchip Technology – Bluetooth Audio Module

RN52
1.1 Audio Interface Circuit
Description
The RN52 audio interface circuit consists of:
• Analog audio interface with differential audio
inputs and outputs
• Digital audio interface with configurable S/PDIF
and I²S interface (A2DP audio output only)
The audio input circuitry has a dual audio input that can
be configured as single-ended or fully differential and
programmed for microphone or line input. It has an
analog and digital programmable gain stage so that it
can be optimized for different microphones. See
Figure 1-5.
1.1.1 DIGITAL AUDIO INTERFACE
The stereo audio CODEC interface has a digital audio
interface. It supports the I2S and S/PDIF interfaces.
The RN52 I2S interface is I2S Master and provides the
bit clock and phase sync clock. The I2S or S/PDIF
interface can be configured through command console.
The typical application interface can be seen in
Figure 1-4.
The audio resolution supported is 24-bit and the max
channel size is 32-bit. The supported sample rates are
8KHz, 32KHz, 44.1KHz and 48KHz. The audio resolu-
tion and the sample rate can be configured using the
UART console command. Refer the RN52 command
specification for more information.
FIGURE 1-4:
I2S AND SPDIF CONNECTIONS
RN52
I2S MASTER
SDOx
DAC/ADC/CODEC/DSP
I2S SLAVE
SDIx
SDIx
SCKx
Serial Clock
SDOx
SCKx
SSx
SSx
Frame Sync. Pulse
RN52
S/PDIF
GND
S/PDIF OUT
S/PDIF IN
VDD
DAC/ADC/CODEC/DSP
S/PDIF
GND
S/PDIF IN
S/PDIF OUT
VDD IN
1.1.2 ANALOG AUDIO INTERFACE
The audio input circuitry has a dual audio input that can
be configured as single-ended or fully differential and
programmed for microphone or line input. It has an
analog and digital programmable gain stage so that it
can be optimized for different microphones. The micro-
phone inputs MIC_L+, MIC_L-, MIC_R+ and MIC_R-
are shown in Figure 1-6.
The audio output circuitry consists of a differential
speaker output preceded by a gain stage and a class
AB amplifier. The speaker outputs SPK_L+, SPK_L-,
SPK_R+ and SPK_R- are shown in Figure 1-6.
The fully differential architecture in the analog signal
path results in low noise sensitivity and good power
supply rejection while effectively doubling the signal
amplitude. It operates from a 1.5V single power supply
and uses a minimum of external components.
The typical application interface is shown in Figure 1-5.
 2015 Microchip Technology Inc.
DS70005120A-page 7