25AA010A Datasheet, PDF (7/28 Pages) Microchip Technology – 1K SPI Bus Serial EEPROM

BLOCK DIAGRAM
STATUS
Register
25AA010A/25LC010A
HV Generator
I/O Control
Logic
Memory X
Control
Logic Dec
EEPROM
Array
Page Latches
SI
SO
CS
SCK
HOLD
WP
VCC
VSS
Y Decoder
Sense Amp.
R/W Control
TABLE 2-1: INSTRUCTION SET
Instruction Name Instruction Format
READ
WRITE
WRDI
WREN
RDSR
WRSR
x = don’t care
0000 x011
0000 x010
0000 x100
0000 x110
0000 x101
0000 x001
Description
Read data from memory array beginning at selected address
Write data to memory array beginning at selected address
Reset the write enable latch (disable write operations)
Set the write enable latch (enable write operations)
Read STATUS register
Write STATUS register
FIGURE 2-1:
CS
READ SEQUENCE
SCK
SI
SO
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23
Instruction
Address byte
0 0 0 0 0 0 1 1 X A₆ A₅ A₄ A₃ A₂ A₁ A₀
high-impedance
data out
76543210
© 2006 Microchip Technology Inc.
Preliminary
DS21832C-page 7