24LC00-I-SN Datasheet, PDF (7/24 Pages) Microchip Technology – 128-Bit I2C™ Bus Serial EEPROM

24AA00/24LC00/24C00
7.0 ACKNOWLEDGE POLLING
Since the device will not acknowledge during a write
cycle, this can be used to determine when the cycle is
complete (this feature can be used to maximize bus
throughput). Once the Stop condition for a Write
command has been issued from the master, the device
initiates the internally timed write cycle. ACK polling
can be initiated immediately. This involves the master
sending a Start condition followed by the control byte
for a Write command (R/W = 0). If the device is still
busy with the write cycle, then no ACK will be returned.
If no ACK is returned, then the Start bit and control byte
must be re-sent. If the cycle is complete, then the
device will return the ACK and the master can then
proceed with the next Read or Write command. See
Figure 7-1 for flow diagram.
FIGURE 7-1:
ACKNOWLEDGE
POLLING FLOW
Send
Write Command
Send Stop
Condition to
Initiate Write Cycle
Send Start
Send Control Byte
with R/W = 0
FIGURE 7-2:
BYTE WRITE
S
BUS ACTIVITY
MASTER
T
A
R
T
Control
Byte
SDA LINE
S1 0 10xx x 0
Word
Address
xxxx
A
BUS ACTIVITY
C
K
x = “don’t care” bit
Did Device
Acknowledge
No
(ACK = 0)?
Yes
Next
Operation
S
Data
T
O
P
P
A
A
C
C
K
K
© 2007 Microchip Technology Inc.
DS21178G-page 7