24AA256_13 Datasheet, PDF (7/42 Pages) Microchip Technology – 256K I2C™ CMOS Serial EEPROM

24AA256/24LC256/24FC256
FIGURE 4-1:
(A) (B)
SCL
DATA TRANSFER SEQUENCE ON THE SERIAL BUS
(D)
(D)
(C) (A)
SDA
Start
Condition
Address or
Acknowledge
Valid
Data
Allowed
to Change
Stop
Condition
FIGURE 4-2:
ACKNOWLEDGE TIMING
Acknowledge
Bit
SCL
1
2
3
4
5
6
7
8
9
1
2
3
SDA
Data from transmitter
Transmitter must release the SDA line at this point,
allowing the Receiver to pull the SDA line low to
acknowledge the previous eight bits of data.
Data from transmitter
Receiver must release the SDA line
at this point so the Transmitter can
continue sending data.
 1998-2013 Microchip Technology Inc.
DS20001203T-page 7