TCM809_05 Datasheet, PDF (5/16 Pages) Microchip Technology – 3-Pin Microcontroller Reset Monitors

4.0 APPLICATIONS INFORMATION
4.1 V_DD Transient Rejection
The TCM809/TCM810 provides accurate V_DD monitor-
ing and reset timing during power-up, power-down and
brown-out/sag conditions. These devices also reject
negative-going transients (glitches) on the power
supply line. Figure 4-1 shows the maximum transient
duration vs. maximum negative excursion (overdrive)
for glitch rejection. Any combination of duration and
overdrive that lies under the curve will not generate a
reset signal.
V_DD
V_TH
Overdrive
Duration
400
T_A = +25°C
320
240
160
TCM8XXL/M/J (SOT-23)
80
TCM8XXZ/R/S/T
0 ^(SOT-23)
1
5
100
1000
Reset Comparator Overdrive
[V_TH – V_DD] (mv)
130
120
110
100
90
80
70
60
50
40
30
1
TCM8XXL/M/J (SC-70)
TCM8XXZ/R/S/T (SC-70)
10
100
Reset Comparator Overdrive (mV)
[V_TH – V_DD] (mv)
1000
FIGURE 4-1:
Maximum Transient
Duration vs. Overdrive for Glitch Rejection at
+25°C.
TCM809/TCM810
Combinations above the curve are detected as a
brown-out or power-down condition. Transient
immunity can be improved by adding a capacitor in
close proximity to the V_DD pin of the TCM809/TCM810.
4.2 RESET Signal Integrity During
Power-Down
The TCM809 RESET output is valid to V_DD = 1.0V.
Below this voltage the output becomes an "open cir-
cuit" and does not sink current. This means CMOS
logic inputs to the microcontroller will be floating at an
undetermined voltage. Most digital systems are
completely shut down well above this voltage.
However, in situations where RESET must be main-
tained valid to V_DD = 0V, a pull-down resistor must be
connected from RESET to ground to discharge stray
capacitances and hold the output low (Figure 4-2). This
resistor value, though not critical, should be chosen
such that it does not appreciably load RESET under
normal operation (100 kΩ will be suitable for most
applications). Similarly, a pull-up resistor to V_DD is
required for the TCM810 to ensure a valid high RESET
for V_DD below 1.0V.
V_DD
V_DD
TCM809
RESET
GND
R₁
100 kΩ
FIGURE 4-2:
The addition of R₁ at the
RESET output of the TCM809 ensures that the
RESET output is valid to V_DD = 0V.
© 2005 Microchip Technology Inc.
DS21661D-page 5