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TC1221 Datasheet, PDF (5/16 Pages) Microchip Technology – High Frequency Switched Capacitor Voltage Converters with Shutdown in SOT Packages
4.0 APPLICATIONS INFORMATION
4.1 Output Voltage Considerations
The TC1221/TC1222 perform voltage conversion but
do not provide regulation. The output voltage will droop
in a linear manner with respect to load current. The
value of this equivalent output resistance is approxi-
mately 25Ω nominal at +25°C and VIN = +5V. VOUT is
approximately -5V at light loads, and droops according
to the equation below:
VDROP = IOUT x ROUT
VOUT = – (VIN – VDROP)
4.2 Charge Pump Efficiency
The overall power efficiency of the charge pump is
affected by four factors:
1. Losses from power consumed by the internal
oscillator, switch drive, etc. (which vary with
input voltage, temperature and oscillator
frequency).
2. I2R losses due to the on-resistance of the
MOSFET switches on-board the charge pump.
3. Charge pump capacitor losses due to effective
series resistance (ESR).
4. Losses that occur during charge transfer (from
the commutation capacitor to the output
capacitor) when a voltage difference between
the two capacitors exists.
Most of the conversion losses are due to factors (2) and
(3) above. These losses are given by Equation 4-1(b).
EQUATION 4-1:
a) PLOSS (2, 3) = IOUT2 x ROUT
b) where ROUT = [ 1 / [fOSC(C1) ] + 8RSWITCH +
4ESRC1 + ESRC2]
The 1/(fOSC)(C1) term in Equation 4-1(b) is the
effective output resistance of an ideal switched
capacitor circuit (Figure 4-1 and Figure 4-2). The value
of RSWITCH can be approximated at 0.5Ω for the
TC1221/TC1222.
The remaining losses in the circuit are due to factor (4)
above, and are shown in Equation 4-2. The output
voltage ripple is given by Equation 4-3.
TC1221/TC1222
EQUATION 4-2:
PLOSS(4) = [(0.5)(C1)(VIN2 – VOUT2) + (0.5)
] (C2)(VRIPPLE2 – 2VOUT VRIPPLE) x fOSC
EQUATION 4-3:
VRIPPLE = [ IOUT / 2 x ( fOSC) (C2)] + 2 ( IOUT) (ESRC2)
FIGURE 4-1:
f
V+
IDEAL SWITCHED
CAPACITOR MODEL
VOUT
C1
C2
RL
FIGURE 4-2:
EQUIVALENT OUTPUT
RESISTANCE
REQUIV
V+
REQUIV = 1
f x C1
C2
VOUT
RL
4.3 Capacitor Selection
In order to maintain the lowest output resistance and
output ripple voltage, it is recommended that low ESR
capacitors be used. Additionally, larger values of C1
will lower the output resistance and larger values of
C2 will reduce output ripple. (Equation 4-1(b) and
Equation 4-3).
 2002 Microchip Technology Inc.
DS21367B-page 5