TC1174 Datasheet, PDF (5/12 Pages) Microchip Technology – 300mA CMOS LDO with Shutdown and VREF Bypass

4.0 THERMAL CONSIDERATIONS
4.1 Thermal Shutdown
Integrated thermal protection circuitry shuts the
regulator off when die temperature exceeds 150°C.
The regulator remains off until the die temperature
drops to approximately 140°C.
4.2 Power Dissipation
The amount of power the regulator dissipates is
primarily a function of input and output voltage, and
output current. The following equation is used to
calculate worst case actual power dissipation:
EQUATION 4-1:
P_D ≈ (V_INMAX – V_OUTMIN)I_LOADMAX
Where:
P_D = Worst case actual power dissipation
V_INMAX = Maximum voltage on V_IN
V_OUTMIN = Minimum regulator output voltage
I_LOADMAX = Maximum output (load) current
The maximum allowable power dissipation (Equation
4-2) is a function of the maximum ambient temperature
(T_AMAX), the maximum allowable die temperature
(T_JMAX) and the thermal resistance from junction-to-air
(θ_JA). The 8-Pin SOIC package has a θ_JA of approxi-
mately 160°C/Watt, while the 8-Pin MSOP package
has a θ_JA of approximately 200°C/Watt.
TC1174
EQUATION 4-2:
P_DMAX = (T_JMAX – T_AMAX)
θ_JA
Where all terms are previously defined.
Equation 4-1 can be used in conjunction with Equation
4-2 to ensure regulator thermal operation is within
limits. For example:
Given:
V_INMAX = 3.0V + 10%
V_OUTMIN = 2.7V – 0.5%
I_LOADMAX = 250mA
T_JMAX = 125°C
T_AMAX = 55°C
8-Pin MSOP Package
Find: 1. Actual power dissipation
2. Maximum allowable dissipation
Actual power dissipation:
P_D ≈ (V_INMAX – V_OUTMIN)I_LOADMAX
= [(3.0 x 1.1) – (2.7 x .995)]250 x 10^–3
= 155mW
Maximum allowable power dissipation:
P_DMAX = (T_JMAX – T_AMAX)
θ_JA
= (125 – 55)
200
= 350mW
In this example, the TC1174 dissipates a maximum of
155mW; below the allowable limit of 350mW. In a
similar manner, Equation 4-1 and Equation 4-2 can be
used to calculate maximum current and/or input
voltage limits. For example, the maximum allowable
V_IN is found by substituting the maximum allowable
power dissipation of 350mW into Equation 4-1, from
which V_INMAX = 4.1V.
4.3 Layout Considerations
The primary path of heat conduction out of the package
is via the package leads. Therefore, layouts having a
ground plane, wide traces at the pads, and wide power
supply bus lines combine to lower θ_JA and therefore
increase the maximum allowable power dissipation
limit.
© 2002 Microchip Technology Inc.
DS21363B-page 5