TC1026 Datasheet, PDF (5/18 Pages) TelCom Semiconductor, Inc – LINEAR BUILDING BLOCK - LOW POWER COMPARATOR WITH OP AMP AND VOLTAGE REFERENCE

3.0 DETAILED DESCRIPTION
The TC1026 is one of a series of very low power, linear
building block products targeted at low voltage, single
supply applications. The TC1026 minimum operating
voltage is 1.8V, and typical supply current is only 12µA.
It combines a comparator, an op amp and a voltage
reference in a single package.
3.1 Comparator
The TC1026 contains one comparator. The compara-
tor’s input range extends beyond both supply voltages
by 200mV and the outputs will swing to within several
millivolts of the supplies depending on the load current
being driven. The inverting input is internally connected
to the output of the reference.
The comparator exhibits propagation delay and supply
current which are largely independent of supply
voltage. The low input bias current and offset voltage
make it suitable for high impedance precision
applications.
3.2 Operational Amplifier
The TC1026 contains one rail-to-rail op amp. The
amplifier’s input range extends beyond both supplies
by 200mV and the outputs will swing to within several
millivolts of the supplies depending on the load current
being driven.
The amplifier design is such that large signal gain, slew
rate and bandwidth are largely independent of supply
voltage. The low input bias current and offset voltage of
the TC1026 make it suitable for precision applications.
3.3 Voltage Reference
A 2.0% tolerance, internally biased, 1.20V bandgap
voltage reference is included in the TC1026. It has a
push-pull output capable of sourcing and sinking at
least 50µA.
TC1026
4.0 TYPICAL APPLICATIONS
The TC1026 lends itself to a wide variety of
applications, particularly in battery powered systems. It
typically finds application in power management,
processor supervisory and interface circuitry.
4.1 External Hysteresis (Comparator)
Hysteresis can be set externally with three resistors
using positive feedback techniques (see Figure 4-1).
The design procedure for setting external comparator
hysteresis is as follows:
1. Choose the feedback resistor R_C. Since the
input bias current of the comparator is at most
100pA, the current through R_C can be set to
100nA (i.e., 1000 times the input bias current)
and retain excellent accuracy. The current
through R_C at the comparator’s trip point is V_R /
R_C where V_R is a stable reference voltage.
2. Determine the hysteresis voltage (V_HY) between
the upper and lower thresholds.
3. Calculate R_A as follows:
EQUATION 4-1:
R_A
=
R
C


-V----^H----^Y-^
V_{D D}^
4. Choose the rising threshold voltage for V_SRC
(V_THR).
5. Calculate R_B as follows:
EQUATION 4-2:
R_B = ----------------------------1------------------------------
 _----V----^T_----^H_---^R_------
_{VR × RA}


–---1----
R_A
–
---1----
R_C
6. Verify the threshold voltages with these
formulas:
V_SRC rising:
EQUATION 4-3:
V_THR
=
(V_R)(R_A)
 _--1----- ₊  _---1---- ₊  _---1----
 _RA  _RB  _RC
V_SRC falling:
EQUATION 4-4:
V_THF = V_THR –
 ^R_-----^A_----^×_-----^V_----^D_----^D_--
 _RC 
© 2002 Microchip Technology Inc.
DS21725B-page 5