EQCO400T8 Datasheet, PDF (5/24 Pages) Microchip Technology – EQCO400T8 UTP Cable Equalizer

EQCO400T8
FIGURE 1-3:
EQCO400T8 BLOCK DIAGRAM SHOWING ELECTRICAL CONNECTIONS
EQCO400T
Carrier Detect
/Mute
SDIp
SDIn
Equalizer
Core
Output Driver
LED
SDOp
SDOn
CLI
1.1 SDIp/SDIn
SDIp/SDIn together form a differential input pair that is
connected to the receive signal pair of the cable. It is
the differential voltage between these pins that the
EQCO400T8 analyzes and adaptively equalizes for
signal level and frequency response. The equalizer
automatically detects and adapts to signals with
different edge rates, e.g. S100, S200 and S400.
Both SDI+ and SDI- inputs are terminated by 50Ω to
VCC on-chip. It is advised to isolate the inputs from
the UTP via a transformer, as shown in Figure 2-1.
1.2 SDOp/SDOn
SDOp/SDOn together form a differential pair outputting
the reconstructed far-end transmit signal. The signals
can be connected via capacitive coupling directly to the
RX signal pair of a standard IEEE1394b PHY.
The EQCO400T8 uses Current Mode Logic (CML)
drivers with source matching for the 110Ω
transmission line.
1.3 CLI
The EQCO400T, being a fully analog equalizer, has a
continuous transfer function with respect to the equal-
ization applied. CLI (Cable Length Indicator) is an ana-
log output. The voltage on the pin is proportional to the
amount of equalization being applied.
CLI can be used qualitatively to indicate the length of
the cable being equalized; the higher the voltage, the
longer the cable. However the CLI pin voltage depends
on a number of factors, including connector quality,
device temperature and to a certain degree on chip-to-
chip variations, and as such cannot be used for
accurate cable length measurement.
Figure 1-4 illustrates the voltage at CLI for a typical
CAT6 cable.
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DS60001310B-page 5