PIC16C432 Datasheet, PDF (49/106 Pages) Microchip Technology – OTP 8-Bit CMOS MCU with LIN Transceiver

PIC16C432
9.3 RESET
The PIC16C432 differentiates between various kinds of
RESET:
a) Power-on Reset (POR)
b) MCLR Reset during normal operation
c) MCLR Reset during SLEEP
d) WDT Reset (normal operation)
e) WDT wake-up (SLEEP)
f) Brown-out Reset (BOD)
Some registers are not affected in any RESET condi-
tion. Their status is unknown on POR and unchanged
in any other RESET. Most other registers are RESET to
a “RESET state” on Power-on Reset, MCLR Reset,
WDT Reset and MCLR Reset during SLEEP. They are
not affected by a WDT wake-up, since this is viewed as
the resumption of normal operation. TO and PD bits are
set or cleared differently in different RESET situations,
as indicated in Table 9-4. These bits are used in soft-
ware to determine the nature of the RESET. See
Table 9-6 for a full description of RESET states of all
registers.
A simplified block diagram of the On-chip Reset Circuit
is shown in Figure 9-6.
The MCLR Reset path has a noise filter to detect and
ignore small pulses. See Table 12-6 for pulse width
specification.
FIGURE 9-6:
SIMPLIFIED BLOCK DIAGRAM OF ON-CHIP RESET CIRCUIT
External
Reset
MCLR/
VPP pin
VDD
WDT
Module
SLEEP
WDT
Timeout
Reset
VDD Rise
Detect
Power-on Reset
Brown-out
Reset
BODEN
OSC1/
CLKIN
pin
OST/PWRT
OST
10-bit Ripple-counter
PWRT
On-chip⁽¹⁾
RC OSC
10-bit Ripple-counter
S
Chip_Reset
R
Q
Enable PWRT
Enable OST
See Table 9-3 for timeout situations.
Note 1: This is a separate oscillator from the RC oscillator of the CLKIN pin.
 2002 Microchip Technology Inc.
Preliminary
DS41140B-page 47