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DSPIC33FJ256GP710-IPF Datasheet, PDF (49/322 Pages) Microchip Technology – High-Performance, 16-Bit Digital Signal Controllers | |||
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TABLE 4-9: I2C1 REGISTER MAP
SFR Name
SFR
Addr
Bit 15
Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9
Bit 8
Bit 7
I2C1RCV
I2C1TRN
I2C1BRG
I2C1CON
I2C1STAT
I2C1ADD
I2C1MSK
Legend:
0200
â
â
â
â
â
â
â
â
0202
â
â
â
â
â
â
â
â
0204
â
â
â
â
â
â
â
0206
I2CEN
â
I2CSIDL SCLREL IPMIEN A10M DISSLW SMEN GCEN
0208 ACKSTAT TRSTAT
â
â
â
BCL GCSTAT ADD10 IWCOL
020A
â
â
â
â
â
â
020C
â
â
â
â
â
â
x = unknown value on Reset, â = unimplemented, read as â0â. Reset values are shown in hexadecimal.
Bit 6
Bit 5
Bit 4
Bit 3
Receive Register
Transmit Register
Baud Rate Generator Register
STREN ACKDT ACKEN RCEN
I2COV D_A
P
S
Address Register
Address Mask Register
Bit 2
PEN
R_W
TABLE 4-10: I2C2 REGISTER MAP
SFR Name
SFR
Addr
Bit 15
Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9
Bit 8
Bit 7
I2C2RCV
I2C2TRN
I2C2BRG
I2C2CON
I2C2STAT
I2C2ADD
I2C2MSK
Legend:
0210
â
â
â
â
â
â
â
â
0212
â
â
â
â
â
â
â
â
0214
â
â
â
â
â
â
â
0216
I2CEN
â
I2CSIDL SCLREL IPMIEN A10M DISSLW SMEN GCEN
0218 ACKSTAT TRSTAT
â
â
â
BCL GCSTAT ADD10 IWCOL
021A
â
â
â
â
â
â
021C
â
â
â
â
â
â
x = unknown value on Reset, â = unimplemented, read as â0â. Reset values are shown in hexadecimal.
Bit 6
Bit 5
Bit 4
Bit 3
Receive Register
Transmit Register
Baud Rate Generator Register
STREN ACKDT ACKEN RCEN
I2COV D_A
P
S
Address Register
Address Mask Register
Bit 2
PEN
R_W
Bit 1
RSEN
RBF
Bit 1
RSEN
RBF
Bit 0
SEN
TBF
All
Resets
0000
00FF
0000
1000
0000
0000
0000
Bit 0
SEN
TBF
All
Resets
0000
00FF
0000
1000
0000
0000
0000
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