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MCP413X Datasheet, PDF (44/88 Pages) Microchip Technology – 7/8-Bit Single/Dual SPI Digital POT with Volatile Memory
MCP413X/415X/423X/425X
6.2 The SPI Modes
The SPI module supports two (of the four) standard SPI
modes. These are Mode 0,0 and 1,1. The mode is
determined by the state of the SDI pin on the rising
edge of the 1st clock bit (of the 8-bit byte).
6.2.1 MODE 0,0
In Mode 0,0: SCK idle state = low (VIL), data is clocked
in on the SDI pin on the rising edge of SCK and clocked
out on the SDO pin on the falling edge of SCK.
6.2.2 MODE 1,1
In Mode 1,1: SCK idle state = high (VIH), data is
clocked in on the SDI pin on the rising edge of SCK and
clocked out on the SDO pin on the falling edge of SCK.
6.3 SPI Waveforms
Figure 6-3 through Figure 6-8 show the different SPI
command waveforms. Figure 6-3 and Figure 6-4 are
read and write commands. Figure 6-5 and Figure 6-6
are read commands when the SDI and SDO pins are
multiplexed on the same pin (SDI/SDO). Figure 6-7
and Figure 6-8 are increment and decrement
commands.
VIH
CS
SCK
VIHH (1)
VIL
Write to
SSPBUF
SDO
SDI
CMDERR bit
bit15 bit14 bit13 bit12 bit11 bit10 bit9 bit8 bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0
AD3 AD2 AD1 AD0
bit15 bit14 bit13 bit12 C1
X D8 D7 D6 D5 D4 D3 D2 D1 D0
C0 bit9 bit8 bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0
Input
Sample
Note 1: VIHH is supported for compability with the MCP414X/6X and MCP424X/6X devices high voltage
operation.
FIGURE 6-3:
16-Bit Commands (Write, Read) - SPI Waveform (Mode 1,1).
VIH
CS
VIHH(1)
VIL
SCK
Write to
SSPBUF
CMDERR bit
SDO
SDI
bit15 bit14 bit13 bit12 bit11 bit10 bit9 bit8 bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0
AD3 AD2 AD1 AD0
bit15 bit14 bit13 bit12 C1
X D8 D7 D6 D5 D4 D3 D2 D1 D0
C0 bit9 bit8 bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0
Input
Sample
Note 1: VIHH is supported for compability with the MCP414X/6X and MCP424X/6X devices high voltage
operation.
FIGURE 6-4:
16-Bit Commands (Write, Read) - SPI Waveform (Mode 0,0).
DS22060B-page 44
© 2008 Microchip Technology Inc.