MCP25050-IP Datasheet, PDF (44/66 Pages) Microchip Technology – CAN I/O Expander Family

MCP2502X/5X
REGISTER 7-6:
ADCON1 REGISTER
R/W-0 R/W-0 R/W-0
ADCS1 ADCS0 VCFG1
bit 7
R/W-0
VCFG0
R/W-0
PCFG3
R/W-0
PCFG2
R/W-0
PCFG1
R/W-0
PCFG0
bit 0
bit 7-6
bit 5-4
bit 3-0
ADCS1:ADCS0: A/D Conversion Select bits
00 = FOSC/2
01 = FOSC/8
10 = FOSC/32
11 = Reserved
VCFG1:VCFG0: Voltage Reference Configuration bits
VCFG1:VCFG0 A/D VREF+
A/D VREF-
00
VDD
VSS
01
External VREF+
VSS
10
VDD
External VREF-
11
External VREF+ External VREF-
PCFG3:PCFG0: A/D Port Configuration Control bits*
1 = Corresponding GPIO pin configured as Digital I/O
0 = Corresponding GPIO pin configured as A/D Input
* corresponding data direction bit (GPDDR register) must be set for each enabled analog
channel.
Legend:
R = Readable bit
- n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared x = Bit is unknown
DS21664D-page 44
© 2007 Microchip Technology Inc.