DSPIC33FJ128GP802-E-MM Datasheet, PDF (430/436 Pages) Microchip Technology – 16-bit Digital Signal Controllers (up to 128 KB Flash and 16K SRAM) with Advanced Analog

dsPIC33FJ32GP302/304, dsPIC33FJ64GPX02/X04, AND dsPIC33FJ128GPX02/X04
IPC17 (Interrupt Priority Control 17) ......................... 124
IPC18 (Interrupt Priority Control 18) ......................... 125
IPC2 (Interrupt Priority Control 2) ............................. 112
IPC3 (Interrupt Priority Control 3) ............................. 113
IPC4 (Interrupt Priority Control 4) ............................. 114
IPC5 (Interrupt Priority Control 5) ............................. 115
IPC6 (Interrupt Priority Control 6) ............................. 116
IPC7 (Interrupt Priority Control 7) ............................. 117
IPC8 (Interrupt Priority Control 8) ............................. 118
IPC9 (Interrupt Priority Control 9) ............................. 119
NVMCON (Flash Memory Control) ............................. 73
NVMKEY (Nonvolatile Memory Key) .......................... 74
OCxCON (Output Compare x Control) ..................... 206
OSCCON (Oscillator Control) ................................... 145
OSCTUN (FRC Oscillator Tuning) ............................ 149
PLLFBD (PLL Feedback Divisor) .............................. 148
PMD1 (Peripheral Module Disable
Control Register 1)............................................ 156
PMD2 (Peripheral Module Disable
Control Register 2)............................................ 157
PMD3 (Peripheral Module Disable
Control Register 3)............................................ 158
PxTCON (PWM Time Base Control)......... 280, 281, 282
RCON (Reset Control) ................................................ 79
RSCON (DCI Receive Slot Control).......................... 261
SPIxCON1 (SPIx Control 1) ...................................... 210
SPIxCON2 (SPIx Control 2) ...................................... 212
SPIxSTAT (SPIx Status and Control) ....................... 209
SR (CPU Status) ................................................... 27, 92
T1CON (Timer1 Control)........................................... 191
TCxCON (Input Capture x Control) ........................... 201
TSCON (DCI Transmit Slot Control) ......................... 261
TxCON (Type B Time Base Control) ........................ 196
TyCON (Type C Time Base Control) ........................ 197
UxMODE (UARTx Mode) .......................................... 223
UxSTA (UARTx Status and Control) ......................... 225
Reset
Illegal Opcode ....................................................... 77, 85
Trap Conflict.......................................................... 84, 85
Uninitialized W Register ........................................ 77, 85
Reset Sequence.................................................................. 87
Resets ................................................................................. 77
S
Serial Peripheral Interface (SPI) ....................................... 207
Software Reset Instruction (SWR) ...................................... 84
Software Simulator (MPLAB SIM)..................................... 335
Software Stack Pointer, Frame Pointer
CALLL Stack Frame.................................................... 61
Special Features of the CPU............................................. 315
SPI Module
SPI1 Register Map ...................................................... 48
Symbols Used in Opcode Descriptions............................. 326
System Control
Register Map............................................................... 60
T
Temperature and Voltage Specifications
AC ..................................................................... 349, 396
Timer1 ............................................................................... 189
Timer2/3 ............................................................................ 193
Timing Characteristics
CLKO and I/O ........................................................... 352
Timing Diagrams
10-bit ADC (CHPS<1:0> = 01,
SIMSAM = 0, ASAM = 0,
SSRC<2:0> = 000) ........................................... 385
10-bit ADC (CHPS<1:0> = 01,
SIMSAM = 0, ASAM = 1, SSRC<2:0> = 111,
SAMC<4:0> = 00001)....................................... 385
12-bit ADC (ASAM = 0,
SSRC<2:0> = 000) ........................................... 383
Brown-out Situations................................................... 84
DCI AC-Link Mode.................................................... 377
DCI Multi -Channel, I²S Modes................................. 375
ECAN I/O .................................................................. 379
External Clock........................................................... 350
I2Cx Bus Data (Master Mode) .................................. 371
I2Cx Bus Data (Slave Mode) .................................... 373
I2Cx Bus Start/Stop Bits (Master Mode)................... 371
I2Cx Bus Start/Stop Bits (Slave Mode)..................... 373
Input Capture (CAPx) ............................................... 357
OC/PWM................................................................... 358
Output Compare (OCx)............................................. 357
Reset, Watchdog Timer, Oscillator Start-up Timer
and Power-up Timer ......................................... 353
Timer1, 2 and 3 External Clock ................................ 355
Timing Requirements
ADC Conversion (10-bit mode)................................. 401
ADC Conversion (12-bit Mode)................................. 401
CLKO and I/O ........................................................... 352
DCI AC-Link Mode.................................................... 378
DCI Multi-Channel, I²S Modes.................................. 376
External Clock........................................................... 350
Input Capture ............................................................ 357
SPIx Master Mode (CKE = 0) ................................... 397
SPIx Module Master Mode (CKE = 1) ...................... 397
SPIx Module Slave Mode (CKE = 0) ........................ 398
SPIx Module Slave Mode (CKE = 1) ........................ 398
Timing Specifications
10-bit ADC Conversion Requirements...................... 386
12-bit ADC Conversion Requirements...................... 384
CAN I/O Requirements ............................................. 379
I2Cx Bus Data Requirements (Master Mode)........... 372
I2Cx Bus Data Requirements (Slave Mode)............. 374
Output Compare Requirements................................ 357
PLL Clock ......................................................... 351, 396
QEI External Clock Requirements ............................ 356
QEI Index Pulse Requirements ................................ 358
Reset, Watchdog Timer, Oscillator Start-up Timer,
Power-up Timer and Brown-out
Reset Requirements......................................... 354
Simple OC/PWM Mode Requirements ..................... 358
Timer1 External Clock Requirements ....................... 355
Timer2 External Clock Requirements ....................... 356
Timer3 External Clock Requirements ....................... 356
U
UART Module
UART1 Register Map............................................ 47, 48
Universal Asynchronous Receiver Transmitter (UART) ... 221
Using the RCON Status Bits............................................... 85
V
Voltage Regulator (On-Chip) ............................................ 319
W
Watchdog Time-out Reset (WDTR).................................... 84
Watchdog Timer (WDT)............................................ 315, 320
Programming Considerations ................................... 320
WWW Address ................................................................. 431
WWW, On-Line Support ..................................................... 11
DS70292G-page 430
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